S39421
INSTRUCTION SET
Instruction
Start
Bit
Opcode
Address
x16
Data
x16
Comments
READ
ERASE
WRITE
EWEN
EWDS
WRAL
1
10
11
01
00
00
00
x(A5–A0)
x(A5–A0)
x(A5–A0)
11xxxx
Read Address AN–A0
Clear Address AN–A0
Write Address AN–A0
Write Enable
1
1
D15–D0
D15–D0
1
1
00xxxx
Write Disable
1
01xxxx
Write All Addresses
2024 PGM T5 .0
Data Download Mode
driven active. At this point, the device will output a dummy
‘0’ followed by the contents of location 0000. As long as
the SK line is toggled the S39421 will continue to output
the contents of sequential address locations. In this
manner, the configuration data that is loaded into an
interface device can be accessed in a simple manner
withoutrequiringthelogicoftheinterfacechiptogenerate
the complex signals needed for the microwire interface.
Data Download mode is exited upon the first high to low
transition of the Chip Select input.
The Data Download mode is an alternative method of
accessing the E2PROM memory. Use of this mode allows
downloading the entire contents of the memory without
entering any commands. The DD mode is enabled after a
low to high transition on the DD pin, while continuing to
assert DD (this includes powering up the device with DD
tied high). Also, as a condition to enter this mode, the
device must not be in a state of reset. Once in Data
Download mode, the device will wait until Chip Select is
VCC
RESET
DD
DD Mode Enabled After
RESET is released and After
DD is Taken to Logic 1
DD Mode
Disabled
CS
SK
DO
Data From
Address 000
Dummy 0
Data From
Address 001
Data From
Address 1FF
Data From
Address 1FE
2024 ILL7.1
FIGURE 11. DATA DOWNLOADER SEQUENCE OF OPERATION
[note: all data download timing conforms to the timing shown in Figure 5]
2024 9.0 8/8/00
13
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
