VIPer20/SP/DIP - VIPer20A/ASP/ADIP
Figure 23: Recommended Layout
T1
D1
C7
D2
R1
2
3
VDD
DRAIN
-
C1
1
C5
OSC
+
13V
COMP SOURCE
5
4
U1
VIPerXX0
R2
C4
C6
C2
C3
ISO1
FC00500
LAYOUT CONSIDERATIONS
- To use different tracks for low level signals and
power ones. The interferences due to a mixing
of signal and power may result in instabilities
and/or anomalous behavior of the device in
case of violent power surge (Input overvoltages,
output short circuits...).
Some simple rules insure a correct running of
switching power supplies. They may be classified
into two categories:
- To minimize power loops: the way the switched
power current must be carefully analyzed and
the corresponding paths must present the
smallest possible inner loop area. This avoids
radiated EMC noises, conducted EMC noises
by magnetic coupling, and provides a better
efficiency by eliminating parasitic inductances,
especially on secondary side.
In case of VIPer, these rules apply as shown in
figure 23. The loops C1-T1-U1, C5-D2-T1, C7-D1-
T1 must be minimized. C6 must be as close as
possible to T1. The signal components C2, ISO1,
C3 and C4 use a dedicated track to be connected
directly to the source of the device.
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