STM8S207xx, STM8S208xx
Electrical characteristics
Total current consumption and timing in forced reset state
Table 29. Total current consumption and timing in forced reset state
Symbol
Parameter
Conditions
DD = 5 V
VDD = 3.3 V
Typ
Max(1)
Unit
V
1.6
0.8
IDD(R)
Supply current in reset state
mA
Reset release to bootloader vector
fetch
tRESETBL
150
µs
1. Data guaranteed by design, not tested in production.
Current consumption of on-chip peripherals
Subject to general operating conditions for V and T .
DD
A
HSI internal RC/f
= f
= 16 MHz.
CPU
MASTER
Table 30. Peripheral current consumption
Symbol
Parameter
TIM1 supply current (1)
Typ.
Unit
IDD(TIM1)
IDD(TIM2)
IDD(TIM3)
IDD(TIM4)
IDD(UART1)
IDD(UART3)
IDD(SPI)
220
120
100
25
TIM2 supply current (1)
TIM3 timer supply current (1)
TIM4 timer supply current (1)
UART1 supply current (2)
UART3 supply current (2)
SPI supply current (2)
90
µA
110
40
I2C supply current (2)
50
2
IDD(I C)
IDD(CAN)
beCAN supply current (2)
ADC2 supply current when converting (3)
210
1000
IDD(ADC2)
1. Data based on a differential IDD measurement between reset configuration and timer counter running at
16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production.
2. Data based on a differential IDD measurement between the on-chip peripheral when kept under reset and
not clocked and the on-chip peripheral when clocked and not kept under reset. No I/O pads toggling. Not
tested in production.
3. Data based on a differential IDD measurement between reset configuration and continuous A/D
conversions. Not tested in production.
Doc ID 14733 Rev 9
63/103
STMICROELECTRONICS [ ST ]
