欢迎访问ic37.com |
会员登录 免费注册
发布采购

STM8S903K3T6C 参数 Datasheet PDF下载

STM8S903K3T6C图片预览
型号: STM8S903K3T6C
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆赫STM8S 8位MCU ,高达8 KB闪存, 1 KB的RAM , 640字节EEPROM , 10位ADC ,2个定时器, UART , SPI , I²C [16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, 1 Kbyte RAM, 640 bytes EEPROM,10-bit ADC, 2 timers, UART, SPI, I²C]
分类和应用: 闪存微控制器和处理器外围集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 116 页 / 1017 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号STM8S903K3T6C的Datasheet PDF文件第2页浏览型号STM8S903K3T6C的Datasheet PDF文件第3页浏览型号STM8S903K3T6C的Datasheet PDF文件第4页浏览型号STM8S903K3T6C的Datasheet PDF文件第5页浏览型号STM8S903K3T6C的Datasheet PDF文件第7页浏览型号STM8S903K3T6C的Datasheet PDF文件第8页浏览型号STM8S903K3T6C的Datasheet PDF文件第9页浏览型号STM8S903K3T6C的Datasheet PDF文件第10页  
List of figures  
STM8S903K3 STM8S903F3  
List of figures  
Figure 1. Block diagram .........................................................................................................................10  
Figure 2. Flash memory organization ....................................................................................................13  
Figure 3. STM8S903F3 TSSOP20/SO20 pinout ...................................................................................23  
Figure 4. STM8S903F3 UFQFPN20 pinout ...........................................................................................23  
Figure 5. STM8S903K3 UFQFPN32/LQFP32 pinout ............................................................................23  
Figure 6. STM8S903K3 SDIP32 pinout .................................................................................................24  
Figure 7. Memory map ...........................................................................................................................27  
Figure 8. Pin loading conditions .............................................................................................................50  
Figure 9. Pin input voltage .....................................................................................................................51  
Figure 10. fCPUmax versus VDD ..............................................................................................................54  
Figure 11. External capacitor CEXT .......................................................................................................55  
Figure 12. Typ IDD(RUN) vs. VDD HSE user external clock, fCPU = 16 MHz .............................................62  
Figure 13. Typ IDD(RUN) vs. fCPU HSE user external clock, VDD = 5 V ....................................................63  
Figure 14. Typ IDD(RUN) vs. VDD HSI RC osc, fCPU = 16 MHz .................................................................63  
Figure 15. Typ IDD(WFI) vs. VDD HSE user external clock, fCPU = 16 MHz ..............................................64  
Figure 16. Typ IDD(WFI) vs. fCPU HSE user external clock, VDD = 5 V .....................................................64  
Figure 17. Typ IDD(WFI) vs. VDD HSI RC osc, fCPU = 16 MHz .................................................................64  
Figure 18. HSE external clocksource .....................................................................................................65  
Figure 19. HSE oscillator circuit diagram ...............................................................................................66  
Figure 20. Typical HSI frequency variation vs VDD @ 4 temperatures ..................................................68  
Figure 21. Typical LSI frequency variation vs VDD @ 4 temperatures ...................................................68  
Figure 22. Typical VIL and VIH vs VDD @ 4 temperatures ......................................................................71  
Figure 23. Typical pull-up resistance vs VDD @ 4 temperatures ............................................................72  
Figure 24. Typical pull-up current vs VDD @ 4 temperatures .................................................................72  
Figure 25. Typ. VOL @ VDD = 5 V (standard ports) ................................................................................74  
Figure 26. Typ. VOL @ VDD = 3.3 V (standard ports) .............................................................................74  
Figure 27. Typ. VOL @ VDD = 5 V (true open drain ports) ......................................................................75  
Figure 28. Typ. VOL @ VDD = 3.3 V (true open drain ports) ...................................................................75  
Figure 29. Typ. VOL @ VDD = 5 V (high sink ports) ................................................................................76  
Figure 30. Typ. VOL @ VDD = 3.3 V (high sink ports) .............................................................................76  
Figure 31. Typ. VDD - VOH@ VDD = 5 V (standard ports) .......................................................................77  
Figure 32. Typ. VDD - VOH @ VDD = 3.3 V (standard ports) ...................................................................77  
Figure 33. Typ. VDD - VOH@ VDD = 5 V (high sink ports) .......................................................................78  
Figure 34. Typ. VDD - VOH@ VDD = 3.3 V (high sink ports) ....................................................................78  
Figure 35. Typical NRST VIL and VIH vs VDD @ 4 temperatures ...........................................................79  
Figure 36. Typical NRST pull-up resistance vs VDD @ 4 temperatures .................................................80  
Figure 37. Typical NRST pull-up current vs VDD @ 4 temperatures ......................................................80  
Figure 38. Recommended reset pin protection ......................................................................................81  
Figure 39. SPI timing diagram - slave mode and CPHA = 0 ..................................................................83  
Figure 40. SPI timing diagram - slave mode and CPHA = 1 ..................................................................83  
Figure 41. SPI timing diagram - master mode(1) ...................................................................................84  
Figure 42. Typical application with I2C bus and timing diagram ............................................................85  
Figure 43. ADC accuracy characteristics ...............................................................................................88  
Figure 44. Typical application with ADC ................................................................................................88  
Figure 45. 32-pin low profile quad flat package (7 x 7) ..........................................................................92  
Figure 46. 32-lead, ultra thin, fine pitch quad flat no-lead package (5 x 5) ............................................94  
Figure 47. 20-lead, ultra thin, fine pitch quad flat no-lead package outline (3 x 3) ................................95  
6/116  
DocID15590 Rev 8  
 复制成功!