Pinouts and pin descriptions
STM8S003F3 STM8S003K3
Table 5. STM8S003K3 descriptions (continued)
Input
Output
Alternate
Default
function
Pin name
alternate
after remap
function
[option bit]
Timer 1 -
channel
4/configurable
clock output
PC4/TIM1_CH4/C
LK_CCO
21
I/O
X
X
X
HS O3
X
X
Port C4
-
22 PC5/SPI_SCK
23 PC6/SPI_MOSI
I/O
I/O
X
X
X
X
X
X
HS O3
HS O3
X
X
X
X
Port C5 SPI clock
-
-
SPI master
out/slave in
Port C6
Port C7
SPI master in/
slave out
24 PC7/SPI_MISO
I/O
I/O
I/O
I/O
X
X
X
X
X
X
X
X
X
X
X
X
HS O3
HS O3
HS O4
HS O3
X
X
X
X
X
X
X
X
-
Configurable
clock output
[AFR5]
PD0/[TIM1_BKIN
[CLK_CCO]
Timer 1 - break
input
25
Port D0
Port D1
Port D2
SWIM data
interface
26 PD1/SWIM(4)
-
Timer 2 -
channel 3
[AFR1]
PD2
27
-
[TIM2_CH3]
Timer 2 -
Port D3 channel2/ADC
PD3/TIM2_CH2
28
I/O
I/O
X
X
X
X
X
X
HS O3
HS O3
X
X
X
X
-
-
[ADC_ETR]
external trigger
Timer 2 -
Port D4 channel
1/BEEP output
PD4/BEEP/
29
TIM2_CH1
UART1 data
Port D5
30 PD5/ UART1_TX I/O
31 PD6/ UART1_RX I/O
PD7/TLI
X
X
X
X
X
X
HS O3
HS O3
X
X
X
X
-
-
transmit
UART1 data
Port D6
receive
Timer 1 -
channel 4
[AFR6]
Top level
Port D7
32
I/O
X
X
X
HS O3
X
X
[TIM1_CH4]
interrupt
1. I/O pins used simultaneously for high-current source/sink must be uniformly spaced around the package. In
addition, the total driven current must respect the absolute maximum ratings given in Section 9: Electrical
characteristics.
2. When the MCU is in Halt/Active-halt mode, PA1 is automatically configured in input weak pull-up and
cannot be used for waking up the device. In this mode, the output state of PA1 is not driven. It is
recommended to use PA1 only in input mode if Halt/Active-halt is used in the application.
3. In the open-drain output column, "T" defines a true open-drain I/O (P-buffer, weak pull-up, and protection
diode to VDD are not implemented).
4. The PD1 pin is in input pull-up during the reset phase and after the internal reset release.
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DocID018576 Rev 5
STMICROELECTRONICS [ ST ]
