Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
Figure 24. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms
t
w(NE)
FSMC_NE
t
t
t
h(NE_NOE)
w(NOE)
v(NOE_NE)
FSMC_NOE
FSMC_NWE
tv(A_NE)
t
h(A_NOE)
FSMC_A[25:0]
Address
tv(BL_NE)
t
h(BL_NOE)
FSMC_NBL[1:0]
t
h(Data_NE)
t
t
su(Data_NOE)
h(Data_NOE)
t
su(Data_NE)
Data
FSMC_D[15:0]
FSMC_NADV(1)
t
v(NADV_NE)
t
w(NADV)
ai14991B
1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
(1) (2)
Table 31. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings
Symbol Parameter Min Max
tw(NE) FSMC_NE low time 5THCLK – 1.5 5THCLK + 2
tv(NOE_NE) 0.5 1.5
tw(NOE)
th(NE_NOE)
tv(A_NE)
Unit
ns
ns
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
5THCLK – 1.5 5THCLK + 1.5 ns
FSMC_NOE high to FSMC_NE high hold time –1.5
FSMC_NEx low to FSMC_A valid
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
0
th(A_NOE)
tv(BL_NE)
th(BL_NOE)
Address hold time after FSMC_NOE high
FSMC_NEx low to FSMC_BL valid
0.1
FSMC_BL hold time after FSMC_NOE high
0
tsu(Data_NE) Data to FSMC_NEx high setup time
tsu(Data_NOE) Data to FSMC_NOEx high setup time
th(Data_NOE) Data hold time after FSMC_NOE high
2THCLK + 25
2THCLK + 25
0
0
th(Data_NE)
Data hold time after FSMC_NEx high
tv(NADV_NE) FSMC_NEx low to FSMC_NADV low
5
tw(NADV)
FSMC_NADV low time
THCLK + 1.5
1. CL = 15 pF.
2. Based on characterization, not tested in production.
Doc ID 14611 Rev 7
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STMICROELECTRONICS [ ST ]
