STM32F405xx, STM32F407xx
Pinouts and pin description
Table 7. STM32F40x pin and ball definitions (continued)
Pin number
Pin name
Alternate functions
Additional functions
(function after
reset)(1)
SPI2_MOSI / I2S2_SD /
OTG_HS_ULPI_NXT /
ETH_MII_TX_CLK/
EVENTOUT
(4)
11 E9 18 29 M5 35
PC3
I/O FT
ADC123_IN13
-
-
19 30 G3 36
VDD
S
S
S
S
S
12 H10 20 31 M1 37
VSSA
-
-
-
-
-
-
N1
-
VREF
–
21 32 P1 38
VREF+
VDDA
13 G9 22 33 R1 39
USART2_CTS/
UART4_TX/
ETH_MII_CRS /
TIM2_CH1_ETR/
TIM5_CH1 / TIM8_ETR/
EVENTOUT
ADC123_IN0/WKUP(4
PA0/WKUP
(PA0)
(5)
14 C10 23 34 N3 40
I/O FT
)
USART2_RTS /
UART4_RX/
ETH_RMII_REF_CLK /
ETH_MII_RX_CLK /
TIM5_CH2 / TIM2_CH2/
EVENTOUT
(4)
(4)
15 F8 24 35 N2 41
PA1
PA2
I/O FT
I/O FT
ADC123_IN1
ADC123_IN2
USART2_TX/TIM5_CH3 /
TIM9_CH1 / TIM2_CH3 /
ETH_MDIO/ EVENTOUT
16 J10 25 36 P2 42
ETH_MII_CRS/EVENTOU
T
-
-
-
-
-
-
-
-
F4 43
G4 44
PH2
PH3
I/O FT
I/O FT
ETH_MII_COL/EVENTOU
T
I2C2_SCL /
OTG_HS_ULPI_NXT/
EVENTOUT
-
-
-
-
-
-
-
-
H4 45
PH4
PH5
I/O FT
I/O FT
J4
46
I2C2_SDA/ EVENTOUT
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