STM32F302xx/STM32F303xx
Electrical characteristics
6.3.2
Operating conditions at power-up / power-down
The parameters given in Table 23 are derived from tests performed under the ambient
temperature condition summarized in Table 22.
Table 23. Operating conditions at power-up / power-down
Symbol
Parameter
Conditions
Min
Max
Unit
VDD rise time rate
0
∞
∞
∞
∞
tVDD
VDD fall time rate
20
0
µs/V
VDDA rise time rate
VDDA fall time rate
tVDDA
20
6.3.3
Embedded reset and power control block characteristics
The parameters given in Table 24 are derived from tests performed under ambient
temperature and V supply voltage conditions summarized in Table 22.
DD
Table 24. Embedded reset and power control block characteristics
Symbol
Parameter
Conditions
Min
Typ Max Unit
1.8(2)
Falling edge
Rising edge
1.88 1.96
V
V
Power on/power down
reset threshold
(1)
VPOR/PDR
1.84 1.92 2.0
(1)
VPDRhyst
PDR hysteresis
-
40
-
mV
POR reset
temporization
(3)
tRSTTEMPO
1.5
2.5
4.5
ms
1. The PDR detector monitors VDD and also VDDA (if kept enabled in the option bytes). The POR detector
monitors only VDD
.
2. The product behavior is guaranteed by design down to the minimum VPOR/PDR value.
3. Guaranteed by design, not tested in production
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STMICROELECTRONICS [ ST ]
