欢迎访问ic37.com |
会员登录 免费注册
发布采购

STM32F107VCT6TR 参数 Datasheet PDF下载

STM32F107VCT6TR图片预览
型号: STM32F107VCT6TR
PDF下载: 下载PDF文件 查看货源
内容描述: [Mainstream Connectivity line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 72 MHz CPU, Ethernet MAC, CAN and USB 2.0 OTG]
分类和应用: 闪存
文件页数/大小: 103 页 / 1881 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号STM32F107VCT6TR的Datasheet PDF文件第17页浏览型号STM32F107VCT6TR的Datasheet PDF文件第18页浏览型号STM32F107VCT6TR的Datasheet PDF文件第19页浏览型号STM32F107VCT6TR的Datasheet PDF文件第20页浏览型号STM32F107VCT6TR的Datasheet PDF文件第22页浏览型号STM32F107VCT6TR的Datasheet PDF文件第23页浏览型号STM32F107VCT6TR的Datasheet PDF文件第24页浏览型号STM32F107VCT6TR的Datasheet PDF文件第25页  
STM32F105xx, STM32F107xx  
Description  
2.3.24  
Remap capability  
This feature allows the use of a maximum number of peripherals in a given application.  
Indeed, alternate functions are available not only on the default pins but also on other  
specific pins onto which they are remappable. This has the advantage of making board  
design and port usage much more flexible.  
For details refer to Table 5: Pin definitions; it shows the list of remappable alternate functions  
and the pins onto which they can be remapped. See the STM32F10xxx reference manual  
for software considerations.  
2.3.25  
ADCs (analog-to-digital converters)  
Two 12-bit analog-to-digital converters are embedded into STM32F105xx and  
STM32F107xx connectivity line devices and each ADC shares up to 16 external channels,  
performing conversions in single-shot or scan modes. In scan mode, automatic conversion  
is performed on a selected group of analog inputs.  
Additional logic functions embedded in the ADC interface allow:  
Simultaneous sample and hold  
Interleaved sample and hold  
Single shunt  
The ADC can be served by the DMA controller.  
An analog watchdog feature allows very precise monitoring of the converted voltage of one,  
some or all selected channels. An interrupt is generated when the converted voltage is  
outside the programmed thresholds.  
The events generated by the standard timers (TIMx) and the advanced-control timer (TIM1)  
can be internally connected to the ADC start trigger and injection trigger, respectively, to  
allow the application to synchronize A/D conversion and timers.  
2.3.26  
DAC (digital-to-analog converter)  
The two 12-bit buffered DAC channels can be used to convert two digital signals into two  
analog voltage signal outputs. The chosen design structure is composed of integrated  
resistor strings and an amplifier in inverting configuration.  
This dual digital Interface supports the following features:  
two DAC converters: one for each output channel  
8-bit or 12-bit monotonic output  
left or right data alignment in 12-bit mode  
synchronized update capability  
noise-wave generation  
triangular-wave generation  
dual DAC channel independent or simultaneous conversions  
DMA capability for each channel  
external triggers for conversion  
input voltage reference V  
REF+  
Doc ID 15274 Rev 6  
21/104  
 
 复制成功!