STM32F105xx, STM32F107xx
Description
2.3.15
Timers and watchdogs
The STM32F105xx and STM32F107xx devices include an advanced-control timer, four
general-purpose timers, two basic timers, two watchdog timers and a SysTick timer.
Table 4 compares the features of the general-purpose and basic timers.
Table 4.
Timer
Timer feature comparison
Counter Counter Prescaler DMA request Capture/compare Complementary
resolution
type
factor
generation
channels
outputs
Up,
down,
Any integer
between 1
TIM1
16-bit
Yes
4
Yes
up/down and 65536
TIMx
(TIM2,
TIM3,
TIM4,
TIM5)
Up,
down,
up/down and 65536
Any integer
between 1
16-bit
16-bit
Yes
Yes
4
0
No
No
Any integer
between 1
and 65536
TIM6,
TIM7
Up
Advanced-control timer (TIM1)
The advanced control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6
channels. It has complementary PWM outputs with programmable inserted dead-times. It
can also be seen as a complete general-purpose timer. The 4 independent channels can be
used for:
●
●
●
●
Input capture
Output compare
PWM generation (edge or center-aligned modes)
One-pulse mode output
If configured as a standard 16-bit timer, it has the same features as the TIMx timer. If
configured as the 16-bit PWM generator, it has full modulation capability (0-100%).
The counter can be frozen in debug mode.
Many features are shared with those of the standard TIM timers which have the same
architecture. The advanced control timer can therefore work together with the TIM timers via
the Timer Link feature for synchronization or event chaining.
General-purpose timers (TIMx)
There are up to 4 synchronizable standard timers (TIM2, TIM3, TIM4 and TIM5) embedded
in the STM32F105xx and STM32F107xx connectivity line devices. These timers are based
on a 16-bit auto-reload up/down counter, a 16-bit prescaler and feature 4 independent
channels each for input capture/output compare, PWM or one pulse mode output. This
gives up to 16 input captures / output compares / PWMs on the largest packages. They can
work together with the Advanced Control timer via the Timer Link feature for synchronization
or event chaining.
The counter can be frozen in debug mode.
Doc ID 15274 Rev 6
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