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STM32F107VCT6TR 参数 Datasheet PDF下载

STM32F107VCT6TR图片预览
型号: STM32F107VCT6TR
PDF下载: 下载PDF文件 查看货源
内容描述: [Mainstream Connectivity line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 72 MHz CPU, Ethernet MAC, CAN and USB 2.0 OTG]
分类和应用: 闪存
文件页数/大小: 103 页 / 1881 K
品牌: STMICROELECTRONICS [ ST ]
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STM32F105xx, STM32F107xx  
Table 65. Document revision history (continued)  
Revision history  
Date  
Revision  
Changes  
Document status promoted from Preliminary data to full datasheet.  
Number of DACs corrected in Table 3: STM32F105xx and  
STM32F107xx family versus STM32F103xx family.  
Note 5 added in Table 5: Pin definitions.  
VRERINT and TCoeff added to Table 12: Embedded internal reference  
voltage.  
Values added to Table 13: Maximum current consumption in Run  
mode, code with data processing running from Flash, Table 14:  
Maximum current consumption in Run mode, code with data  
processing running from RAM and Table 15: Maximum current  
consumption in Sleep mode, code running from Flash or RAM.  
Typical IDD_VBAT value added in Table 16: Typical and maximum  
current consumptions in Stop and Standby modes.  
Figure 10: Typical current consumption on VBAT with RTC on vs.  
temperature at different VBAT values added.  
Values modified in Table 17: Typical current consumption in Run  
mode, code with data processing running from Flash and Table 18:  
Typical current consumption in Sleep mode, code running from Flash  
or RAM.  
fHSE_ext min modified in Table 20: High-speed external user clock  
characteristics.  
CL1 and CL2 replaced by C in Table 22: HSE 3-25 MHz oscillator  
characteristics and Table 23: LSE oscillator characteristics (fLSE =  
32.768 kHz), notes modified and moved below the tables. Note 1  
modified below Figure 16: Typical application with an 8 MHz crystal.  
14-Sep-2009  
4
Conditions removed from Table 26: Low-power mode wakeup  
timings.  
Standards modified in Section 5.3.10: EMC characteristics on  
page 52, conditions modified in Table 31: EMS characteristics.  
Jitter maximum values added to Table 27: PLL characteristics and  
Table 28: PLL2 and PLL3 characteristics.  
RPU and RPD modified in Table 36: I/O static characteristics.  
Condition added for VNF(NRST) parameter in Table 39: NRST pin  
characteristics. Note removed and RPD, RPU values added in  
Table 46: USB OTG FS DC electrical characteristics.  
Table 48: Ethernet DC electrical characteristics added.  
Parameter values added to Table 49: Dynamic characteristics:  
Ethernet MAC signals for SMI, Table 50: Dynamic characteristics:  
Ethernet MAC signals for RMII and Table 51: Dynamic  
characteristics: Ethernet MAC signals for MII.  
CADC and RAIN parameters modified in Table 52: ADC  
characteristics. RAIN max values modified in Table 53: RAIN max for  
fADC = 14 MHz.  
Table 56: DAC characteristics modified. Figure 38: 12-bit buffered  
/non-buffered DAC added.  
Table 64: Applicative current consumption in Run mode, code with  
data processing running from Flash added.  
Small text changes.  
Doc ID 15274 Rev 6  
101/104  
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