Application block diagrams
STM32F105xx, STM32F107xx
A.4
USB OTG FS interface + Ethernet/I2S interface solutions
With the clock tree implemented on the STM32F107xx, only one crystal is required to work
with both the USB (host/device/OTG) and the Ethernet (MII/RMII) interfaces. Figure 55
illustrate the solution.
Figure 55. USB OTG FS + Ethernet solution
STM32F107 MCU
Div
by 5
PLL2MUL
x8
25 MHz
XTAL
SYSCLK
Up to 72 MHz
PLLVCO
(2 xPLLCLK
OTG
48 MHz
Div
by 5
Div
by 3
USB
PHY
PLLMUL
x9
Sel
PLL3MUL
x10
Ethernet
PHY
MCO
I2S
Up to 50 MHz
2% accuracy
Sel
With the clock tree implemented on the STM32F107xx, only one crystal is required to work
2
with both the USB (host/device/OTG) and the I S (Audio) interfaces. Figure 56 illustrate the
solution.
2
Figure 56. USB OTG FS + I S (Audio) solution
STM32F105 /STM32F107MCU
14.7456 MHz
XTAL
Div
by 4
PLL2MUL
x8
SYSCLK
Up to 71.88 MHz
PLLVCO
(2 xPLLCLK
OTG
Div
by 4
Div
by 3
USB
PHY
PLLMUL
x6.5
47.9232 MHz
Sel
0.16% accuracy
Ethernet
PHY
MCLK
SCLK
MCO
PLL3VCO
(2 xPLL3CLK
PLL3MUL
x20
I2S
Up to 147.456 MHz
Less than 0.5% accuracy
on MCLK and SCLK
96/104
Doc ID 15274 Rev 6
STMICROELECTRONICS [ ST ]
