Electrical characteristics
STM32F103x8, STM32F103xB
5.3.13
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in
are derived from tests
performed under the conditions summarized in
All I/Os are CMOS and TTL
compliant.
Table 35.
Symbol
I/O static characteristics
Parameter
Conditions
Standard IO
input low level
voltage
Min
-
Typ
-
Max
0.28*(V
DD
-2 V)+0.8 V
(1)
0.32*(V
DD
-2V)+0.75 V
(1)
0.35V
DD(2)
V
0.41*(V
DD
-2 V)+1.3 V
(1)
-
-
Unit
V
IL
Low level input voltage IO FT
(3)
input
low level voltage
All I/Os except
BOOT0
Standard IO
input high level
voltage
-
-
-
-
V
IH
High level input voltage
IO FT
(3)
input
high level
voltage
All I/Os except
BOOT0
0.42*(V
DD
-2 V)+1 V
(1)
0.65V
DD(2)
-
-
-
-
V
hys
Standard IO Schmitt
trigger voltage
hysteresis
(4)
IO FT Schmitt trigger
voltage hysteresis
(4)
V
SS
≤
V
IN
≤
V
DD
Standard I/Os
V
IN
= 5 V
I/O FT
V
IN
=
V
SS
V
IN
=
V
DD
200
-
-
mV
5% V
DD(5)
-
-
30
30
-
-
-
-
40
40
5
-
±1
µA
3
50
kΩ
50
-
pF
I
lkg
Input leakage current
(6)
R
PU
R
PD
C
IO
Weak pull-up
equivalent resistor
(7)
Weak pull-down
equivalent resistor
(7)
I/O pin capacitance
1. Data based on design simulation.
2. Tested in production.
3. FT = Five-volt tolerant. In order to sustain a voltage higher than V
DD
+0.3 the internal pull-up/pull-down resistors must be
disabled.
4. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production.
5. With a minimum of 100 mV.
6. Leakage could be higher than max. if negative current is injected on adjacent pins.
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