Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
(1)
Table 38. Switching characteristics for CF read and write cycles (continued)
Timing
Symbol
Parameter
Unit
Min
Max
td(NCEx-NWE)
tw(NWE)
FSMC_NCEx low to FSMC_NWE low
FSMC_NWE low width
-
TBD
ns
TBD
TBD cycles/ns
td(NWE-NCEx)
FSMC_NWE high to FSMC_NCEx high
FSMC_NWE high to FSMC_NCE4_1 high
TBD
ns
ns
td(NWE-NCE4_1)
td(NCE4_1-NWE)
td(NWE-NWAITL)
td(NWE-NWAITH)
td(NWAIT-NWE)
tv(NWE-D)
FSMC_NCE4_1 low to FSMC_NWE low
FSMC_NWAIT low after FSMC_NWE low(2)
FSMC_NWAIT high after FSMC_NWE low(2)
FSMC_NWE high after FSMC_NWAIT high
FSMC_NWE low to FSMC_D[15:0] valid
FSMC_NWE high to FSMC_D[15:0] invalid
FSMC_NCE4_1 high to FSMC_D[15:0] invalid
FSMC_NIORD low width
TBD
ns
ns
ns
ns
ns
ns
ns
ns
ns
TBD
TBD
-
-
TBD
-
th(NWE-D)
TBD
th(NCE4_1-D)
tw(NIORD)
tELIWL
FSMC_NCEx setup before FSMC_NWE low
Address valid to FSMC_NIOIS16 valid
tAVISL/H
35
1. TBD = to be determined.
2. When one or more wait states are inserted. If no wait state needs inserted, NWAIT should be kept high or
the wait feature should be disabled (WAITEN=0) in the control register.
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