STM32F103x4, STM32F103x6
Electrical characteristics
Output driving current
The GPIOs (general-purpose inputs/outputs) can sink or source up to ±8 mA, and sink or
source up to ±20 mA (with a relaxed V
OL
/V
OH
).
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in
●
The sum of the currents sourced by all the I/Os on V
DD,
plus the maximum Run
consumption of the MCU sourced on V
DD,
cannot exceed the absolute maximum rating
I
VDD
(see
The sum of the currents sunk by all the I/Os on V
SS
plus the maximum Run
consumption of the MCU sunk on V
SS
cannot exceed the absolute maximum rating
I
VSS
(see
●
Output voltage levels
Unless otherwise specified, the parameters given in
are derived from tests
performed under ambient temperature and V
DD
supply voltage conditions summarized in
All I/Os are CMOS and TTL compliant.
Table 36.
Symbol
V
OL(1)
V
OH(3)
V
OL (1)
V
OH
(3)
Output voltage characteristics
Parameter
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Conditions
CMOS port
(2)
,
I
IO
= +8 mA
2.7 V < V
DD
< 3.6 V
TTL port
(2)
I
IO
=+ 8mA
2.7 V < V
DD
< 3.6 V
Min
Max
0.4
V
V
DD
–0.4
0.4
V
2.4
1.3
V
V
DD
–1.3
0.4
V
V
DD
–0.4
Unit
V
OL(1)(4)
V
OH(3)(4)
V
OL(1)(4)
V
OH(3)(4)
I
IO
= +20 mA
2.7 V < V
DD
< 3.6 V
I
IO
= +6 mA
2 V < V
DD
< 2.7 V
1. The I
IO
current sunk by the device must always respect the absolute maximum rating specified in
and the sum of I
IO
(I/O ports and control pins) must not exceed I
VSS
.
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3. The I
IO
current sourced by the device must always respect the absolute maximum rating specified in
and the sum of I
IO
(I/O ports and control pins) must not exceed I
VDD
.
4. Based on characterization data, not tested in production.
Doc ID 15060 Rev 5
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