Electrical characteristics
STM32F103x4, STM32F103x6
5.3.13
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in
are derived from tests
performed under the conditions summarized in
All I/Os are CMOS and TTL
compliant.
Table 35.
Symbol
I/O static characteristics
Parameter
Conditions
Min
–0.3
–0.3
0.41*(V
DD
-2 V)+1.3 V
V
DD
> 2 V
V
DD
≤
2 V
0.42*(V
DD
-2 V)+1 V
Typ
Max
0.28*(V
DD
-2 V)+0.8 V
0.32*(V
DD
-2V)+0.75 V
V
DD
+0.3
5.5
V
5.2
mV
Unit
V
V
V
Standard IO input low
level voltage
V
IL
IO FT
(1)
input low level
voltage
Standard IO input high
level voltage
V
IH
IO FT
(1)
input high level
voltage
Standard IO Schmitt
trigger voltage
hysteresis
(2)
IO FT Schmitt trigger
voltage hysteresis
(2)
V
SS
≤
V
IN
≤
V
DD
Standard I/Os
V
IN
= 5 V
I/O FT
Weak pull-up equivalent
resistor
(5)
Weak pull-down
equivalent resistor
(5)
I/O pin capacitance
V
IN
=
V
SS
V
IN
=
V
DD
200
V
hys
5% V
DD(3)
±1
mV
I
lkg
Input leakage current
(4)
µA
3
30
30
40
40
5
50
50
kΩ
kΩ
pF
R
PU
R
PD
C
IO
1. FT = Five-volt tolerant. In order to sustain a voltage higher than V
DD
+0.3 the internal pull-up/pull-down resistors must be
disabled.
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production.
3. With a minimum of 100 mV.
4. Leakage could be higher than max. if negative current is injected on adjacent pins.
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
PMOS/NMOS contribution
to the series resistance is minimum
(~10% order)
.
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