Electrical characteristics
STM32F103x8, STM32F103xB
Figure 12. Pin loading conditions
Figure 13. Pin input voltage
STM32F103xx pin
STM32F103xx pin
C = 50 pF
V
IN
ai14141
ai14142
5.1.6
Power supply scheme
Figure 14. Power supply scheme
V
BAT
Backup circuitry
(OSC32K,RTC,
Wake-up logic
Power switch
1.8-3.6V
Backup registers)
OUT
IN
IO
Logic
GP I/Os
Kernel logic
(CPU,
Digital
& Memories)
V
DD
V
DD
1/2/3/4/5
Regulator
5 × 100 nF
+ 1 × 4.7 µF
V
SS
1/2/3/4/5
V
DD
V
DDA
V
REF
V
REF+
Analog:
RCs, PLL,
...
10 nF
+ 1 µF
10 nF
+ 1 µF
V
ADC
REF-
V
SSA
ai14125d
Caution:
In Figure 14, the 4.7 µF capacitor must be connected to V
.
DD3
36/102
Doc ID 13587 Rev 14
STMICROELECTRONICS [ ST ]
