欢迎访问ic37.com |
会员登录 免费注册
发布采购

STM32F103R8T6 参数 Datasheet PDF下载

STM32F103R8T6图片预览
型号: STM32F103R8T6
PDF下载: 下载PDF文件 查看货源
内容描述: 性能线,基于ARM的32位MCU和Flash , USB , CAN , 7个16位定时器,2个ADC和9通信接口 [Performance line, ARM-based 32-bit MCU with Flash, USB, CAN, seven 16-bit timers, two ADCs and nine communication interfaces]
分类和应用: 微控制器和处理器外围集成电路PC通信时钟
文件页数/大小: 67 页 / 1083 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号STM32F103R8T6的Datasheet PDF文件第27页浏览型号STM32F103R8T6的Datasheet PDF文件第28页浏览型号STM32F103R8T6的Datasheet PDF文件第29页浏览型号STM32F103R8T6的Datasheet PDF文件第30页浏览型号STM32F103R8T6的Datasheet PDF文件第32页浏览型号STM32F103R8T6的Datasheet PDF文件第33页浏览型号STM32F103R8T6的Datasheet PDF文件第34页浏览型号STM32F103R8T6的Datasheet PDF文件第35页  
STM32F103xx  
Electrical characteristics  
Typical current consumption  
The MCU is placed under the following conditions:  
All I/O pins are in input mode with a static value at V or V (no load).  
DD SS  
All peripherals are disabled except if it is explicitly mentioned.  
The Flash access time is adjusted to f frequency (0 wait state from 0 to 24 MHz, 1  
HCLK  
wait state from 24 to 48 MHZ and 2 wait states above).  
Ambient temperature and V supply voltage conditions summarized in Table 7.  
DD  
(1)  
Table 13. Typical current consumption in Run and Sleep modes  
Symbol Parameter  
Conditions  
fHCLK  
Typ(2)  
Unit  
72 MHz  
48 MHz  
36 MHz  
24 MHz  
16 MHz  
8 MHz  
21  
18  
Oscillator running at 8 MHz with PLL, code  
running from Flash, all peripheral disabled  
TBD  
13  
mA  
(see RCC register description): fPCLK1  
fHCLK/2, fPCLK2=fHCLK  
=
TBD  
7.8  
4 MHz  
7
Running on HSI clock, code running from  
Flash, all peripheral disabled (see RCC  
register description): fPCLK1= fHCLK/2,  
fPCLK2=fHCLK. AHB pre-scaler used to  
reduce the frequency  
2 MHz  
6.3  
Supply  
current in  
Run mode  
mA  
1 MHz  
6.2  
500 kHz  
125 kHz  
8 MHz  
6.1  
5.95  
2.3  
4 MHz  
1.6  
Running on HSI clock, code running from  
RAM, all peripheral disabled (see RCC  
register description): fPCLK1= fHCLK/2,  
fPCLK2=fHCLK. AHB pre-scaler used to  
reduce the frequency  
IDD  
2 MHz  
1.2  
mA  
mA  
1 MHz  
1
500 kHz  
125 kHz  
72 MHz  
48 MHz  
36 MHz  
24 MHz  
16 MHz  
8 MHz  
0.88  
0.82  
6
TBD  
TBD  
TBD  
1
Oscillator running at 8MHz with PLL, code  
running from Flash, all peripheral disabled  
(see RCC register description): fPCLK1  
HCLK/2, fPCLK2=fHCLK  
=
f
Supply  
current in  
Sleep mode  
TBD  
TBD  
TBD  
TBD  
TBD  
Running on HSI clock, code running from  
Flash, all peripheral disabled (see RCC  
register description): fPCLK1= fHCLK/2,  
fPCLK2=fHCLK. AHB pre-scaler used to  
reduce the frequency  
4 MHz  
2 MHz  
mA  
1 MHz  
500 kHz  
1. TBD stands for to be determined.  
2. Typical values are measures at TA = 25 °C, VDD = 3.3 V.  
31/67