欢迎访问ic37.com |
会员登录 免费注册
发布采购

STM32F103RBT6XXXTR 参数 Datasheet PDF下载

STM32F103RBT6XXXTR图片预览
型号: STM32F103RBT6XXXTR
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: 微控制器和处理器外围集成电路PC通信时钟
文件页数/大小: 67 页 / 1083 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号STM32F103RBT6XXXTR的Datasheet PDF文件第53页浏览型号STM32F103RBT6XXXTR的Datasheet PDF文件第54页浏览型号STM32F103RBT6XXXTR的Datasheet PDF文件第55页浏览型号STM32F103RBT6XXXTR的Datasheet PDF文件第56页浏览型号STM32F103RBT6XXXTR的Datasheet PDF文件第58页浏览型号STM32F103RBT6XXXTR的Datasheet PDF文件第59页浏览型号STM32F103RBT6XXXTR的Datasheet PDF文件第60页浏览型号STM32F103RBT6XXXTR的Datasheet PDF文件第61页  
STM32F103xx  
Electrical characteristics  
General PCB design guidelines  
Power supply decoupling should be performed as shown in Figure 25 or Figure 26,  
depending on whether V is connected to V or not. The 10 nF capacitors should be  
REF+  
DDA  
ceramic (good quality). They should be placed them as close as possible to the chip.  
Figure 25. Power supply and reference decoupling (V  
not connected to V  
)
DDA  
REF+  
STM32F103xx  
VREF+  
(see note 1)  
1 µF // 10 nF  
VDDA  
1 µF // 10 nF  
VSSA /VREF+  
(see note 1)  
ai14388  
1. VREF+ and VREF– inputs are available only on 100-pin packages.  
Figure 26. Power supply and reference decoupling (V  
connected to V  
)
REF+  
DDA  
STM32F103xx  
VREF+/VDDA  
(See note 1)  
1 µF // 10 nF  
VREF–/VSSA  
(See note 1)  
ai14389  
1. VREF+ and VREF– inputs are available only on 100-pin packages.  
57/67  
 复制成功!