STLC60135
PIN SUMMARY
(continued)
Mnemonic
U_RxData
U_TxData
U_RxADDR
U_TxADDR
U_RxCLAV
U_TxCLAV
U_RxENBB
U_TxENBB
U_RxSOC
U_TxSOC
U_RxCLK
U_TxCLK
U_RxRefB
U_TxRefB
Type
OZ
I
I
I
OZ
OZ
I-TTL
I-TTL
OZ
I-TTL
I-TTL
I-TTL
O
I-TTL
BS Type
B
I
I
I
O
O
I
I
O
I
C
C
O
I
Signals
8
8
5
5
1
1
1
1
1
1
1
1
1
1
Function
Receive interface Data
Transmit interface Data
Receive interface Address
Transmit interface Address
Receive interface Cell Available
Transmit interface Cell Available
Receive interface Enable
Transmit interface Enable
Receive interface Start of Cell
Transmit interface Start of Cell
Receive interface Utopia Clock
Transmit interface Utopia Clock
8kHz reference clock to ATM device
8kHz reference clock from ATM device
ATM UTOPIA Interface
ATM SLAP Interface
SLR_VAL_S
SLR_VAL_F
SLR_DATA_S
SLR_DATA_F
SLT_REQ_S
SLT_REQ_F
SLT_DATA_S
SLT_DATA_F
SLAP_CLOCK
SLR_FRAME_I
SLT_FRAME_I
SLR_FRAME_F
SLT_FRAME_F
O
O
O
O
O
O
I
I
O
O
O
O
O
1
1
2
2
1
1
2
2
1
1
1
1
1
Miscellaneous
GP_IN
GP_OUT
RESETB
TESTSE
IDDq
I
I-PU
I-PD
I-TTL
O
OZ
IO
BS cell
I
O
B
C
=
=
=
=
=
=
=
=
=
=
=
=
I-PD
O
I
I
I
I
O
I
none
none
2
1
I
none
none
General purpose input
General purpose output
Hard reset
Enable scan test mode
Test pin, active high
Input, CMOS levels
Input with pull-up resistance, CMOS levels
Input with pull-down resistance, CMOS levels
Input TTL levels
Push-pull output
Push-pull output with high-impedance state
Input / Tristate Push-pull output
Boundary-Scan cell
Input cell
Output cell
Bidirectional cell
Clock
7/25
STMICROELECTRONICS [ STMICROELECTRONICS ]
