STA8088EXG
Pin description
2.9
Port 1 pins
Port 1 consists of a 32-bit bidirectional I/O port. It can be either used as general purpose
input or output port, or configured according to the associated alternate functions.
Table 9.
Port 1 pins
Symbol
I/O Voltage I/O
Mode
Functions
TFBGA169
SSP_CSN/iopwrsel_r1: SSP chip select active low
/ I/O ring 1 power selection
O
Default
I/O
A
B
C
GPIO32: general purpose I/O
P1.0
VDD_IOR1
J11
I/O
O
SignGGPS: GGPS 3bit coding output (Sign)
SQI_Cen: SQI Flash chip enable
I/O Default SSP_CLK: SSP clock
I/O
I/O
O
A
B
C
GPIO33: general purpose I/O
Clock_GGPS: GGPS clock out
SQI_Clk: SQI Flash clock
P1.1
P1.2
P1.3
VDD_IOR1
VDD_IOR1
VDD_IOR1
F11
H11
G11
I
Default SSP_DI: SSP serial data input
I/O
I/O
I/O
O
A
B
C
GPIO34: general purpose I/O
SignGNS: GNS 3bit coding output (Sign)
SQI_SIO0/SI: SQI Flash data I/O 0 / ser. I
Default SSP_DO: SSP serial data output
I/O
I/O
I/O
I
A
B
C
GPIO35: general purpose I/O
Clock_GNS: GNS clock out
SQI_SIO1/SO: SQI Flash data I/O 1 / ser. O
Default UART2_RX: UART 2 Rx data
GPIO36: general purpose I/O
Default UART2_TX: UART 2 Tx data / ARM Boot 0
GPIO37: general purpose I/O
Default UART0_RX: UART 0 Rx data
P1.4
P1.5
VDD_IOR1
VDD_IOR1
K12
K11
I/O
O
A
I/O
I
A
P1.6
VDD_IOR1 I/O
A
C
GPIO38: general purpose I/O
SQI_SIO2: SQI Flash data I/O 2
L13
I/O
O
VDD_IOR1 I/O
I/O
Default UART0_TX: UART 0 Tx data / ARM Boot 1
P1.7
P1.8
A
C
GPIO39: general purpose I/O
SQI_SIO3: SQI Flash data I/O 3
K13
F7
O
VDD_IOR3
I/O
Default FSMC_Add0: FSMC EMI address bus 0
A
GPIO40: general purpose I/O
Doc ID 022725 Rev. 2
15/24
STMICROELECTRONICS [ ST ]
