ST92F124/F150/F250 - SINGLE VOLTAGE FLASH & E3 TM (EMULATED EEPROM)
3 SINGLE VOLTAGE FLASH & E3 TM (EMULATED EEPROM)
3.1 INTRODUCTION
The Flash circuitry contains one array divided in
two main parts that can each be read independ-
ently. The first part contains the main Flash array
for code storage, a reserved array (TestFlash) for
system routines and a 128-byte area available as
one time programmable memory (OTP). The sec-
ond part contains the two dedicated Flash sectors
used for EEPROM Hardware Emulation.
The write operations of the two parts are managed
by an embedded Program/Erase Controller.
Through a dedicated RAM buffer the Flash and the
E
3 TM can be written in blocks of 16 bytes.
Figure 30. Flash Memory Structure (Example for 64K Flash device)
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Address
Data
230000h
231F80h
TestFlash
8 Kbytes
User OTP and Protection registers
Register
Interface
000000h
RAM buffer
16 bytes
Sector F0
8 Kbytes
Sector F1
8 Kbytes
002000h
004000h
Program / Erase
Controller
Sector F2
48 Kbytes
010000h
22CFFFh
228000h
Hardware emulated EEPROM sectors
8 Kbytes (Reserved)
2203FFh
220000h
Emulated EEPROM
1 Kbyte
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