ST92F124/F150/F250 - GENERAL DESCRIPTION
Figure 6. ST92F124R9: Pin Configuration (Top-view TQFP64)
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N.C
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
WAIT/WKUP5/P5.0
WKUP6/WDOUT/P5.1
SIN/WKUP2/P5.2
WDIN/SOUT/P5.3
TXCLK/CLKOUT/P5.4
RXCL0/WKUP7/P5.5
DCD/WKUP8/P5.6
WKUP9/RTS/P5.7
WKUP4/P4.4
P6.5/WKUP10/INTCLK
P6.4/NMI
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
P6.3/INT3/INT5
P6.2/INT2/INT4
P6.0/INT0/INT1/CLOCK2/8
P0.7(/AIN7***)
P0.6(/AIN6***)
P0.5(/AIN5***)
P0.4(/AIN4***)
P0.3(/AIN3***)
P0.2(/AIN2***)
P0.1(/AIN1***)
P0.0(/AIN0***)
Reserved*
ST92F124R9
EXTRG/STOUT/P4.5
SDA/P4.6
WKUP1/SCL/P4.7
SS/P3.4
MISO/P3.5
MOSI/P3.6
SCK/WKUP0/P3.7
Reserved*
17181920212223242526272829303132
* Reserved for ST tests, must be left unconnected
** V must be kept low in standard operating mode
TEST
*** The ST92F150-EMU2 emulator does not emulate ADC channels from AIN0 to AIN7 and extended function tim-
ers because they are not implemented on the emulator chip. See also Section 13.2 on page 418
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STMICROELECTRONICS [ ST ]
