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M95640-WMN6TP/P 参数 Datasheet PDF下载

M95640-WMN6TP/P图片预览
型号: M95640-WMN6TP/P
PDF下载: 下载PDF文件 查看货源
内容描述: [8KX8 SPI BUS SERIAL EEPROM, PDSO8, 0.169 INCH, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, TSSOP-8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 47 页 / 620 K
品牌: STMICROELECTRONICS [ ST ]
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Instructions  
M95640-W M95640-R M95640-DF  
6.2  
Write Disable (WRDI)  
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction  
to the device.  
As shown in Figure 8, to send this instruction to the device, Chip Select (S) is driven low,  
and the bits of the instruction byte are shifted in, on Serial Data Input (D).  
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select  
(S) being driven high.  
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:  
Power-up  
WRDI instruction execution  
WRSR instruction completion  
WRITE instruction completion.  
Figure 8.  
Write Disable (WRDI) sequence  
S
0
1
2
3
4
5
6
7
C
D
Q
Instruction  
High Impedance  
AI03750D  
18/47  
Doc ID 16877 Rev 16  
 
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