M29W320ET, M29W320EB
Table 7. Status Register Bits
Operation
Address
DQ7
DQ6
DQ5
DQ3
DQ2
RB
0
Program
Any Address
Any Address
DQ7
Toggle
0
–
–
Program During Erase
Suspend
0
DQ7
Toggle
0
–
–
Program Error
Chip Erase
Any Address
Any Address
DQ7
Toggle
Toggle
1
0
0
0
0
0
0
–
1
0
0
1
1
–
–
Hi-Z
0
0
0
0
0
0
1
Toggle
Erasing Block
Toggle
Toggle
0
Block Erase before
timeout
Non-Erasing Block
Erasing Block
Toggle
No Toggle
Toggle
0
Toggle
0
Block Erase
Erase Suspend
Erase Error
0
Non-Erasing Block
Erasing Block
Toggle
No Toggle
Toggle
No Toggle
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Non-Erasing Block
Good Block Address
Faulty Block Address
Data read as normal
0
0
Toggle
Toggle
1
1
1
No Toggle
Toggle
1
Note: Unspecified data bits should be ignored.
Figure 7. Data Polling Flowchart
START
Figure 8. Toggle Flowchart
START
READ DQ6
ADDRESS = BA
READ DQ5 & DQ7
at VALID ADDRESS
READ
DQ5 & DQ6
ADDRESS = BA
DQ7
=
DATA
YES
DQ6
=
NO
NO
TOGGLE
NO
YES
DQ5
= 1
NO
DQ5
YES
= 1
YES
READ DQ7
at VALID ADDRESS
READ DQ6
TWICE
ADDRESS = BA
DQ7
=
YES
DQ6
=
DATA
NO
TOGGLE
NO
FAIL
YES
FAIL
PASS
PASS
AI90194
AI08929b
Note: BA = Address of Block being Programmed or Erased.
20/46