DALC208
Figure 8.
Technical information
ESD behavior: parasitic phenomena due to unsuitable layout
Vcl+
167V
ESD
SURGE
Vf
I/O
Lw
REF2=+Vcc
Lw di
dt
Lw di
dt
Vcc+Vf
t
tr=1ns
POSITIVE
SURGE
VI/O
Lw di
dt
di
Vcl+ = Vcc+Vf+Lw dt surge >0
di
surge <0
Vcl- = -Vf- Lw
dt
tr=1ns
t
-Vf
-Lw
di
dt
NEGATIVE
SURGE
REF1=GND
-162V
Vcl-
2.3
How to ensure good ESD protection
While the DALC208SC6 provides a high immunity to ESD surge, an efficient protection
depends on the layout of the board. In the same way, with the rail to rail topology, the track
from the V
REF2
pin to the power supply +V
CC
and from the V
REF1
pin to GND must be as short
as possible to avoid over voltages due to parasitic phenomena. See
It’s often harder to connect the power supply near to the DALC208SC6 unlike the ground
thanks to the ground plane that allows a short connection.
To ensure the same efficiency for positive surges when the connections can’t be short
enough, we recommend putting a capacitance of 100 nF close to the DALC208SC6,
between V
REF2
and ground, to prevent these kinds of overvoltage disturbances.
See
The addition of this capacitance will allow a better protection by providing a constant voltage
during a surge.
and
show the improvement of the ESD protection according
to the recommendations described above.
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