Technical information
DALC208
Figure 9.
ESD behavior: optimized layout and Figure 10. ESD behavior: measurement
add of a capacitance of 100 nF
conditions (with coupling
capacitance)
ESD
SURGE
TEST BOARD
REF2=+Vcc
C=100nF
t
Vcl+
ESD
SURGE
Lw
POSITIVE
SURGE
I/O
Vcl+ = Vcc+Vf
VI/O
Vcl- =
-Vf
surge >0
surge <0
NEGATIVE
SURGE
t
DALC
208
+5V
REF1=GND
Vcl-
Figure 11. Remaining voltage after the
DALC208SC6 during positive ESD
surge
IEC61000-4-2
Air Discharge
(150pF/330Ω)
Vpp=15kV
Figure 12. Remaining voltage after the
DALC208SC6 during negative ESD
surge
IEC61000-4-2
Air Discharge
(150pF/330Ω)
Vpp=15kV
Important
A precaution to take is to put the protection device as close as possible to the disturbance
source (generally the connector).
Note:
The measurements have been done with the DALC208SC6 in open circuit.
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