1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39SF010A / SST39SF020A / SST39SF040
Data Sheet
AC CHARACTERISTICS
TABLE 9: READ CYCLE TIMING PARAMETERS VDD = 4.5-5.5V
SST39SF010A/020A/040-45
SST39SF010A/020A/040-70
Symbol Parameter
Min
Max
Min
Max
Units
ns
TRC
TCE
TAA
Read Cycle Time
45
70
Chip Enable Access Time
Address Access Time
45
45
25
70
70
35
ns
ns
TOE
TCLZ
TOLZ
Output Enable Access Time
CE# Low to Active Output
OE# Low to Active Output
CE# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
ns
1
1
0
0
0
0
ns
ns
1
TCHZ
15
15
25
25
ns
1
TOHZ
ns
1
TOH
0
0
ns
T9.4 1147
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 10: PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol Parameter
Min
Max
Units
TBP
Byte-Program Time
20
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
TAS
Address Setup Time
Address Hold Time
WE# and CE# Setup Time
WE# and CE# Hold Time
OE# High Setup Time
OE# High Hold Time
CE# Pulse Width
0
30
0
TAH
TCS
TCH
TOES
TOEH
TCP
0
0
10
40
40
30
30
40
0
TWP
WE# Pulse Width
1
TWPH
WE# Pulse Width High
CE# Pulse Width High
Data Setup Time
1
TCPH
TDS
1
TDH
Data Hold Time
1
TIDA
Software ID Access and Exit Time
Sector-Erase
150
25
TSE
TSCE
Chip-Erase
100
ms
T10.1 1147
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2003 Silicon Storage Technology, Inc.
S71147-06-000
8/04
9
SST [ SILICON STORAGE TECHNOLOGY, INC ]
