1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39SF010A / SST39SF020A / SST39SF040
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
SuperFlash
Memory
X-Decoder
Memory Address
Address Buffers & Latches
Y-Decoder
CE#
OE#
WE#
I/O Buffers and Data Latches
Control Logic
DQ - DQ
7
0
1147 B1.2
SST39SF040 SST39SF020A SST39SF010A
SST39SF010A SST39SF020A SST39SF040
4
3
2
1
32 31 30
29
5
A7
A6
A7
A6
A7
A6
A14
A13
A8
A14
A13
A8
A14
A13
A8
6
28
27
26
25
24
23
22
21
7
A5
A5
A5
8
A4
A4
A4
A9
A9
A9
32-lead PLCC
Top View
9
A3
A3
A3
A11
OE#
A10
CE#
DQ7
A11
OE#
A10
CE#
DQ7
A11
OE#
A10
CE#
DQ7
10
11
12
13
A2
A2
A2
A1
A1
A1
A0
A0
A0
DQ0
DQ0
DQ0
14 15 16 17 18 19 20
1147 32-plcc P2.4
FIGURE 1: PIN ASSIGNMENTS FOR 32-LEAD PLCC
©2003 Silicon Storage Technology, Inc.
S71147-06-000
8/04
4