2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
INTERNAL PROGRAM OPERATION STARTS
T
BP
5555
2AAA
5555
ADDR
ADDRESS A
MS-0
T
AH
T
DH
T
CP
CE#
T
T
AS
DS
T
CPH
OE#
WE#
T
CH
T
CS
DQ
15-0
XXAA
SW0
XX55
SW1
XXA0
SW2
DATA
WORD
(ADDR/DATA)
360 ILL F05.4
Note:
A
A
= Most significant address
MS
MS
= A for SST39LF/VF200A, A for SST39LF/VF400A and A for SST39LF/VF800A
16 17 18
X can be V or V , but no other value.
IL IH
FIGURE 5: CE# CONTROLLED PROGRAM CYCLE TIMING DIAGRAM
ADDRESS A
MS-0
T
CE
CE#
OE#
WE#
T
OES
T
OEH
T
OE
DQ
7
DATA
DATA#
DATA#
DATA
360 ILL F06.3
Note:
A
A
= Most significant address
MS
MS
= A for SST39LF/VF200A, A for SST39LF/VF400A and A for SST39LF/VF800A
16 17 18
FIGURE 6: DATA# POLLING TIMING DIAGRAM
©2001 Silicon Storage Technology, Inc.
S71117-04-000 6/01 360
16
SST [ SILICON STORAGE TECHNOLOGY, INC ]
