2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
TABLE 10: DC OPERATING CHARACTERISTICS
VDD = 3.0-3.6V FOR SST39LF200A/400A/800A AND 2.7-3.6V FOR SST39VF200A/400A/800A
Limits
Symbol Parameter
Min
Max Units Test Conditions
Address input = VIL/VIH, at f=1/TRC Min.,
IDD
Power Supply Current
VDD=VDD Max.
Read
30
30
20
1
mA
mA
µA
µA
µA
CE#=OE#=VIL,WE#=VIH, all I/Os open
CE#=WE#=VIL, OE#=VIH
CE#=VIHC, VDD = VDD Max.
VIN =GND to VDD, VDD = VDD Max.
VOUT =GND to VDD, VDD = VDD Max.
VDD = VDD Min.
Program and Erase
Standby VDD Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
ISB
ILI
ILO
10
0.8
VIL
VIH
VIHC
VOL
VOH
0.7VDD
V
V
V
V
VDD = VDD Max.
VDD-0.3
VDD = VDD Max.
0.2
IOL = 100 µA, VDD = VDD Min.
IOH = -100 µA, VDD = VDD Min.
VDD-0.2
T10.5 360
TABLE 11: RECOMMENDED SYSTEM POWER-UP TIMINGS
Symbol
Parameter
Minimum
100
Units
1
TPU-READ
Power-up to Read Operation
Power-up to Program/Erase Operation
µs
µs
1
TPU-WRITE
100
T11.0 360
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 12: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
VI/O = 0V
Maximum
1
CI/O
I/O Pin Capacitance
Input Capacitance
12 pF
6 pF
1
CIN
VIN = 0V
T12.0 360
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 13: RELIABILITY CHARACTERISTICS
Symbol
Parameter
Endurance
Data Retention
Latch Up
Minimum Specification
Units
Test Method
1
NEND
10,000
100
Cycles JEDEC Standard A117
1
TDR
Years
mA
JEDEC Standard A103
JEDEC Standard 78
1
ILTH
100 + IDD
T13.1 360
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71117-04-000 6/01 360
12