512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040
SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
AC CHARACTERISTICS
TABLE 9: R
EAD
C
YCLE
T
IMING
P
ARAMETERS
V
DD
= 3.0-3.6V
FOR
SST39LF512/010/020/040
AND
2.7-3.6V
FOR
SST39VF512/010/020/040
SST39LF512-45
SST39LF010-45
SST39LF020-45
SST39LF040-45
Symbol Parameter
T
RC
T
CE
T
AA
T
OE
T
CLZ1
T
OLZ1
T
CHZ
T
OH1
SST39LF020-55
SST39LF040-55
Min
55
Max
55
55
30
0
0
SST39VF512-70
SST39VF010-70
SST39VF020-70
SST39VF040-70
Min
70
70
70
35
0
0
Max
Units
ns
ns
ns
ns
ns
ns
25
25
0
ns
ns
ns
T9.2 1150
Min
45
Max
45
45
30
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
CE# Low to Active Output
OE# Low to Active Output
CE# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
0
0
15
15
0
15
15
0
T
OHZ1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 10: P
ROGRAM
/E
RASE
C
YCLE
T
IMING
P
ARAMETERS
Symbol
T
BP
T
AS
T
AH
T
CS
T
CH
T
OES
T
OEH
T
CP
T
WP
T
WPH1
T
CPH1
T
DS
T
DH
T
SE
T
SCE
Parameter
Byte-Program Time
Address Setup Time
Address Hold Time
WE# and CE# Setup Time
WE# and CE# Hold Time
OE# High Setup Time
OE# High Hold Time
CE# Pulse Width
WE# Pulse Width
WE# Pulse Width High
CE# Pulse Width High
Data Setup Time
Data Hold Time
Software ID Access and Exit Time
Sector-Erase
Chip-Erase
Min
0
30
0
0
0
10
40
40
30
30
40
0
Max
20
Units
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T
IDA1
150
25
100
ns
ms
ms
T10.1 1150
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2005 Silicon Storage Technology, Inc.
S71150-09-000
1/06
9
SST [ SILICON STORAGE TECHNOLOGY, INC ]
