4 Mbit SuperFlash EEPROM
SST28SF040A / SST28VF040A
Data Sheet
command can be reissued as many times as necessary to
complete the Chip-Erase operation. The SST28SF/
VF040A cannot be over-erased. (See Figure 8)
Command Definitions
Table 4 contains a command list and a brief summary of
the commands. The following is a detailed description of
the operations initiated by each command.
Byte-Program Operation
The Byte-Program operation is initiated by writing the setup
command (10H). Once the program setup is performed,
programming is executed by the next WE# pulse. See Fig-
ures 5 and 6 for timing waveforms. The address bus is
latched on the falling edge of WE# or CE#, whichever
occurs last. The data bus is latched on the rising edge of
WE# or CE#, whichever occurs first, and begins the Pro-
gram operation. The Program operation is terminated auto-
matically by an internal timer. See Figure 16 for the
programming flowchart.
Sector-Erase Operation
The Sector-Erase operation erases all bytes within a sector
and is initiated by a setup command and an execute com-
mand. A sector contains 256 Bytes. This sector erasability
enhances the flexibility and usefulness of the SST28SF/
VF040A, since most applications only need to change a
small number of bytes or sectors, not the entire chip.
The setup command is performed by writing 20H to the
device. The execute command is performed by writing D0H
to the device. The Erase operation begins with the rising
edge of the WE# or CE#, whichever occurs first and termi-
nates automatically by using an internal timer. The End-of-
Erase can be determined using either Data# Polling, Tog-
gle Bit, or Successive Reads detection methods. See Fig-
ure 9 for timing waveforms.
The two-step sequence of a setup command followed by
an execute command ensures that only the addressed
byte is programmed and other bytes are not inadvertently
programmed.
The Byte-Program Flowchart Description
The two-step sequence of a setup command followed by
an execute command ensures that only memory contents
within the addressed sector are erased and other sectors
are not inadvertently erased.
Programming data into the SST28SF/VF040A is accom-
plished by following the Byte-Program flowchart shown in
Figure 16. The Byte-Program command sets up the byte
for programming. The address bus is latched on the falling
edge of WE# or CE#, whichever occurs last. The data bus
is latched on the rising edge of WE# or CE#, whichever
occurs first and begins the Program operation. The end of
program can be detected using either the Data# Polling,
Toggle bit, or Successive reads.
Sector-Erase Flowchart Description
Fast and reliable erasing of the memory contents within a
sector is accomplished by following the Sector-Erase flow-
chart as shown in Figure 18. The entire procedure consists
of the execution of two commands. The Sector-Erase oper-
ation will terminate after a maximum of 4 ms. A Reset com-
mand can be executed to terminate the Sector-Erase
operation; however, if the Erase operation is terminated
prior to the 4 ms time-out, the sector may not be fully
erased. A Sector-Erase command can be reissued as
many times as necessary to complete the Erase operation.
The SST28SF/VF040A cannot be over-erased.
Reset Operation
The Reset command is provided as a means to safely
abort the Erase or Program command sequences. Follow-
ing either setup commands (Erase or Program) with a write
of FFH will safely abort the operation. Memory contents will
not be altered. After the Reset command, the device
returns to the Read mode. The Reset command does not
enable Software Data Protection. See Figure 7 for timing
waveforms.
Chip-Erase Operation
The Chip-Erase operation is initiated by a setup command
(30H) and an execute command (30H). The Chip-Erase
operation allows the entire array of the SST28SF/VF040A
to be erased in one operation, as opposed to 2048 Sector-
Erase operations. Using the Chip-Erase operation will mini-
mize the time to rewrite the entire memory array. The Chip-
Erase operation will terminate after a maximum of 20 ms. A
Reset command can be executed to terminate the Erase
operation; however, if the Chip-Erase operation is termi-
nated prior to the 20 ms time-out, the chip may not be com-
pletely erased. If an erase error occurs a Chip-Erase
Read
The Read operation is initiated by setting CE#, and OE# to
logic low and setting WE# to logic high (See Table 3). See
Figure 4 for Read cycle timing waveform. The Read opera-
tion from the host retrieves data from the array. The device
remains enabled for Read until another operation mode is
accessed. During initial power-up, the device is in the Read
mode and is Software Data protected. The device must be
unprotected to execute a Write command.
©2001 Silicon Storage Technology, Inc.
S71077-04-000 6/01 310
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