FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
1.0 FUNCTIONAL BLOCKS
FUNCTIONAL BLOCK DIAGRAM
8051
CPU Core
ALU,
ACC,
B-Register,
Instruction Register,
Program Counter,
Timing and Control
Interrupt
Oscillator
10 Interrupts
Control
Flash Control Unit
Watchdog Timer
SuperFlash
EEPROM
Primary
RAM
1K x8
Block
8K/16K/32K/64K x8
8
I/O
I/O
I/O
I/O Port 0
Secondary
Block
8K x8
8
8
Security
Lock
I/O Port 1
I/O Port 2
I/O Port 3
8
4
Timer 0 (16-bit)
Timer 1 (16-bit)
Timer 2 (16-bit)
PCA
I/O
I/O
I/O Port 4
SPI
Enhanced
UART
1255 B1.0
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
7