FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
3.0 MEMORY ORGANIZATION
The device has separate address spaces for program and
data memory.
bank selection. Please refer to Figures 3-1 through 3-4 for
the program memory configuration. Program bank selec-
tion is described in the next section.
3.1 Program Flash Memory
The 8K/16K/32K/64K x8 primary SuperFlash block is orga-
nized as 64/128/256/512 sectors, each sector consists of
128 Bytes.
There are two internal flash memory blocks in the device.
The primary flash memory block (Block 0) has 8/16/32/64
KByte. The secondary flash memory block (Block 1) has 8
KByte. Since the total program address space is limited to
64 KByte, the SFCF[1:0] bit are used to control program
The 8K x8 secondary SuperFlash block is organized as 64
sectors, each sector consists also of 128 Bytes.
For both blocks, the 7 least significant program address bits
select the byte within the sector. The remainder of the pro-
gram address bits select the sector within the block.
EA# = 1
EA# = 1
EA# = 1
EA# = 0
SFCF[1:0] = 00
SFCF[1:0] = 01
SFCF[1:0] = 10, 11
FFFFH
FFFFH
FFFFH
FFFFH
8 KByte
Block 1
8 KByte
Block 1
E000H
DFFFH
E000H
DFFFH
Not
Accessible
External
64 KByte
Not
Accessible
Not
Accessible
2000H
1FFFH
8000H
7FFFH
8000H
7FFFH
8 KByte
Block 1
8 KByte
Block 0
8 KByte
Block 0
0000H
0000H
0000H
0000H
1255 F01.0
FIGURE
3-1: PROGRAM MEMORY ORGANIZATION FOR 8 KBYTE SST89E/V52RD2
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
11
SST [ SILICON STORAGE TECHNOLOGY, INC ]
