FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
Watchdog Timer Data/Reload Register (WDTD)
Location
7
6
5
4
3
2
1
0
Reset Value
85H
Watchdog Timer Data/Reload
00H
Symbol
Function
WDTD
Initial/Reload value in Watchdog Timer. New value won’t be effective until WDT is set.
PCA Timer/Counter Control Register1 (CCON)
Location
7
6
5
4
3
2
1
0
Reset Value
D8H
CF
CR
-
CCF4
CCF3
CCF2
CCF1
CCF0
00x00000b
1. Bit addressable
Symbol
Function
PCA Counter Overflow Flag
CF
Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in CMOD
is set. CF may be set by either hardware or software, but can only cleared by software.
CR
PCA Counter Run control bit
Set by software to turn the PCA counter on. Must be cleared by software to turn the
PCA counter off.
-
Not implemented, reserved for future use.
Note: User should not write ‘1’s to reserved bits. The value read from a reserved bit is indeterminate.
CCF4
CCF3
CCF2
CCF1
CCF0
PCA Module 4 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
PCA Module 3 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
PCA Module 2 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
27