FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
PCA Timer/Counter Mode Register1 (CMOD)
Location
7
6
5
4
3
2
1
0
Reset Value
D9H
CIDL
WDTE
-
-
-
CPS1
CPS0
ECF
00xxx000b
1. Not bit addressable
Symbol
Function
CIDL
Counter Idle Control:
0: Programs the PCA Counter to continue functioning during idle mode
1: Programs the PCA Counter to be gated off during idle
WDTE
-
Watchdog Timer Enable:
0: Disables Watchdog Timer function on PCA module 4
1: Enables Watchdog Timer function on PCA module 4
Not implemented, reserved for future use.
Note: User should not write ‘1’s to reserved bits. The value read from a reserved bit is indeterminate.
CPS1
CPS0
PCA Count Pulse Select bit 1
PCA Count Pulse Select bit 2
Selected
CPS1 CPS0 PCA Input1
Internal clock, fOSC/6 in 6 clock mode (fOSC/12 in 12 clock mode)
Internal clock, fOSC/2 in 6 clock mode (fOSC/4 in 12 clock mode)
Timer 0 overflow
0
0
1
1
0
1
0
1
0
1
2
3
External clock at ECI/P1.2 pin
(max. rate = fOSC/4 in 6 clock mode, fOSC/8 in 12 clock mode)
1. fOSC = oscillator frequency
ECF
PCA Enable Counter Overflow interrupt:
0: Disables the CF bit in CCON
1: Enables CF bit in CCON to generate an interrupt
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
28
SST [ SILICON STORAGE TECHNOLOGY, INC ]
