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89E52RD2-40-C-NJE 参数 Datasheet PDF下载

89E52RD2-40-C-NJE图片预览
型号: 89E52RD2-40-C-NJE
PDF下载: 下载PDF文件 查看货源
内容描述: 8位8051 Compatibale单片机(MCU)与嵌入式超快闪记忆 [8 bit 8051-Compatibale Microcontroller (MCU) with Embedded SuperFlash Memory]
分类和应用: 微控制器
文件页数/大小: 91 页 / 969 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
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FlashFlex51 MCU  
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2  
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2  
Preliminary Specifications  
SuperFlash Configuration Register (SFCF)  
Location  
7
6
5
4
3
2
1
0
Reset Value  
B1H  
-
IAPEN  
-
-
-
-
SWR  
BSEL  
x0xxxx00b  
Symbol  
Function  
Enable IAP operation  
IAPEN  
0: IAP commands are disabled  
1: IAP commands are enabled  
SWR  
BSEL  
Software Reset  
See Section 10.2, “Software Reset”  
Program memory block switching bit  
See Figures 3-1 through 3-4 and Tables 3-3 and 3-4  
SuperFlash Command Register (SFCM)  
Location  
7
6
5
4
3
2
1
0
Reset Value  
B2H  
FIE  
FCM6  
FCM5  
FCM4  
FCM3  
FCM2  
FCM1  
FCM0  
00H  
Symbol  
Function  
FIE  
Flash Interrupt Enable.  
0: INT1# is not reassigned.  
1: INT1# is re-assigned to signal IAP operation completion.  
External INT1# interrupts are ignored.  
FCM[6:0]  
Flash operation command  
000_0001b Chip-Erase  
000_1011b Sector-Erase  
000_1101b Block-Erase  
000_1100b Byte-Verify1  
000_1110b Byte-Program  
000_1111b Prog-SB1  
000_0011b Prog-SB2  
000_0101b Prog-SB3  
000_1001b Prog-SC0  
000_1001b Prog-SC1  
000_1000bEnable-Clock-Double  
All other combinations are not implemented, and reserved for future use.  
1. Byte-Verify has a single machine cycle latency and will not generate any INT1# interrupt regardless of FIE.  
SuperFlash Address Registers (SFAL)  
Location  
7
6
5
4
3
2
1
0
Reset Value  
B3H  
SuperFlash Low Order Byte Address Register  
00H  
Symbol  
Function  
Mailbox register for interfacing with flash memory block. (Low order address register).  
SFAL  
SuperFlash Address Registers (SFAH)  
Location  
7
6
5
4
3
2
1
0
Reset Value  
B4H  
SuperFlash High Order Byte Address Register  
00H  
Symbol  
Function  
Mailbox register for interfacing with flash memory block. (High order address register).  
SFAH  
©2004 Silicon Storage Technology, Inc.  
S71255-00-000  
3/04  
22  
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