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CY2SSTU32866 参数 Datasheet PDF下载

CY2SSTU32866图片预览
型号: CY2SSTU32866
PDF下载: 下载PDF文件 查看货源
内容描述: 1.8V , 25位( 1 : 1 ) 14位( 1 : 2 ) JEDEC兼容的数据寄存器与校验 [1.8V, 25-bit (1:1) of 14-bit (1:2) JEDEC-Compliant Data Register with Parity]
分类和应用:
文件页数/大小: 24 页 / 236 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY2SSTU32866  
Pin Definition (continued)  
Pin Number  
(C0 = 0, C1 = 0)  
Pin Number  
(C0 = 0, C1 = 1)  
Pin Number  
(C0 = 1, C1 = 1)  
Pin Name  
Description  
Q12B, 13B  
P6, R6  
T6  
P6, R6  
Data Outputs that are suspended by the DCS#  
and CSR# control  
Q14B  
Data Outputs that are suspended by the DCS#  
and CSR# control  
Q15-25  
QCSA#  
QCSB#  
QODTA  
QODTB  
QCKEA  
QCKEB  
PPO  
B6, C6, E6, F6, K6, L6,  
M6, N6, P6, R6, T6  
Data Outputs that are suspended by the DCS#  
and CSR# control  
H5  
D5  
A5  
H5  
H6  
D5  
D6  
A5  
A6  
A2  
D2  
G1  
H5  
H6  
N5  
N6  
T5  
T6  
A2  
D2  
G1  
Data outputs that will not be suspended by the  
DCS# and CSR# control  
Data outputs that will not be suspended by the  
DCS# and CSR# control  
Data outputs that will not be suspended by the  
DCS# and CSR# control  
Data outputs that will not be suspended by the  
DCS# and CSR# control  
Data outputs that will not be suspended by the  
DCS# and CSR# control  
Data outputs that will not be suspended by the  
DCS# and CSR# control  
A2  
Partial parity out – indicates odd parity of inputs  
D1-D25  
QERR#  
PAR_IN  
NC  
D2  
Output error bit – generated one clock cycle after  
the corresponding data output  
G1  
Parity input – arrives one clock cycle after the  
corresponding data input  
A6, D6, H6  
B2, C2, E2, F2, K2, B2, C2, E2, F2, K2, No Connect Pins  
L2, M2, N2, P2,  
R2, T2  
L2, M2, N2, P2,  
R2, T2  
Table 2. Flip Flop Function Table  
Inputs  
CK  
Outputs  
RESET#  
DCS#  
CSR#  
CK#  
pn  
pn  
L or H  
Dn, DODT, DCKE  
Qn  
L
QCS# QODT, QCKE  
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
pn  
pn  
L or H  
L
L
L
L
H
H
H
L
L
X
Q0  
L
Q0  
L
Q0  
L
L
H
H
H
L
pn  
pn  
L or H  
pn  
pn  
L or H  
L
L
H
H
L
H
L
X
Q0  
L
Q0  
H
Q0  
L
H
H
H
H
H
H
pn  
pn  
L or H  
pn  
pn  
L or H  
L
L
H
H
H
H
L
X
Q0  
Q0  
Q0  
Q0  
L
Q0  
H
Q0  
L
H
H
H
pn  
pn  
L or H  
pn  
pn  
L or H  
L
H
X
H
H
Q0  
L
Q0  
L
X or Floating X or Floating X or Floating X or Floating  
X or Floating  
Rev 1.0,November 25, 2006  
Page 4 of 24