CY28RS400
AC Electrical Specifications (continued)
Parameter
Description
REF Rise and Fall Times
Condition
Min.
0.5
–
Max.
4.0
Unit
TR / TF
Measured between 0.8V and 2.0V
V/n
s
TCCJ
REF Cycle to Cycle Jitter
Measurement at 1.5V
1000
ps
ENABLE/DISABLE and SET-UP
TSTABLE Clock Stabilization from Power-up
TSS
–
10.0
0
1.8
–
ms
ns
ns
Stopclock Set-up Time
Stopclock Hold Time
TSH
–
Test and Measurement Set-up
For PCI Single-ended Signals and Reference
The following diagram shows the test load configurations for
the single-ended PCI, USB, and REF output signals.
Measurement
Point
5pF
ꢃꢄ:
ꢁꢂ:
PCI/
USB
Measurement
Point
5pF
ꢃꢄ:
ꢁꢂ:
Measurement
Point
5pF
ꢃꢄ:
ꢁꢂ:
Measurement
Point
5pF
ꢃꢄ:
ꢁꢂ:
REF
Measurement
Point
5pF
ꢃꢄ:
ꢁꢂ:
Figure 12. Single-ended Load Configuration
For Differential CPU and SRC Output Signals
The following diagram shows the test load configuration for the
differential CPU and SRC outputs.
M e a s u re m e n t
P o in t
2 p F
ꢁ ꢄ ꢄ ꢀ:
ꢅ ꢅ :
C P U T
S R C T
ꢆ ꢇ ꢈꢇ :
M e a s u re m e n t
P o in t
2 p F
ꢁ ꢄ ꢄ ꢀ:
ꢅ ꢅ :
C P U C
S R C C
IR E F
ꢆ ꢇ ꢈꢇ :
ꢆ ꢉ ꢊ :
Figure 13. 0.7V Load Configuration
Rev 1.0,November 22, 2006
Page 16 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
