CY28443-3
Test and Measurement Set-up
For PCI Single-ended Signals and Reference
The following diagram shows test load configurations for the
single-ended PCI, USB, and REF output signals.
Measurement
Point
33:
PCI/
USB
60:
5 pF
Measurement
Point
12:
12:
60:
60:
5 pF
REF
Measurement
Point
5 pF
Figure 14.Single-ended Load Configuration Low Drive Option
Measurement
Point
5 pF
Measurement
Point
12:
60:
60:
12:
PCI/
USB
5 pF
Measurement
Point
12:
60:
5 pF
Measurement
Point
12:
12:
REF
60:
60:
5 pF
Measurement
Point
5 pF
Figure 15. Single-ended Load Configuration High Drive Option
The following diagram shows the test load configuration for the
differential CPU and SRC outputs.
M e a s u re m e n t
P o in t
3 3 :
C P U T
S R C T
D O T 9 6 T
2 p F
4 9 .9 :
9 6 _ 1 0 0 _ S S C T
ꢁ ꢂ ꢂ : ꢀD iffe re n tia l
M e a s u re m e n t
P o in t
2 p F
C P U C
S R C C
D O T 9 6 C
3 3 :
4 9 .9 :
9 6 _ 1 0 0 _ S S C C
IR E F
4 7 5 :
Figure 16. 0.7V Differential Load Configuration
Rev 1.0,November 20, 2006
Page 21 of 23
SPECTRALINEAR [ SPECTRALINEAR INC ]
