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CY28443ZXC-3 参数 Datasheet PDF下载

CY28443ZXC-3图片预览
型号: CY28443ZXC-3
PDF下载: 下载PDF文件 查看货源
内容描述: 时钟发生器Intel㈢ Calistoga的芯片组 [Clock Generator for Intel㈢ Calistoga Chipset]
分类和应用: 时钟发生器
文件页数/大小: 23 页 / 242 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
 浏览型号CY28443ZXC-3的Datasheet PDF文件第12页浏览型号CY28443ZXC-3的Datasheet PDF文件第13页浏览型号CY28443ZXC-3的Datasheet PDF文件第14页浏览型号CY28443ZXC-3的Datasheet PDF文件第15页浏览型号CY28443ZXC-3的Datasheet PDF文件第17页浏览型号CY28443ZXC-3的Datasheet PDF文件第18页浏览型号CY28443ZXC-3的Datasheet PDF文件第19页浏览型号CY28443ZXC-3的Datasheet PDF文件第20页  
CY28443-3  
Absolute Maximum Conditions  
Parameter  
VDD  
Description  
Core Supply Voltage  
Condition  
Min.  
–0.5  
–0.5  
Max.  
4.6  
Unit  
V
VDD_A  
VIN  
Analog Supply Voltage  
4.6  
V
Input Voltage  
Relative to VSS  
–0.5 VDD + 0.5 VDC  
TS  
Temperature, Storage  
Non-functional  
–65  
150  
85  
150  
20  
60  
°C  
°C  
TA  
Temperature, Operating Ambient  
Temperature, Junction  
Functional  
0
TJ  
Functional  
°C  
ØJC  
Dissipation, Junction to Case  
Dissipation, Junction to Ambient  
ESD Protection (Human Body Model)  
Flammability Rating  
Mil-STD-883E Method 1012.1  
JEDEC (JESD 51)  
MIL-STD-883, Method 3015  
At 1/8 in.  
°C/W  
°C/W  
V
ØJA  
ESDHBM  
UL-94  
MSL  
2000  
V–0  
1
Moisture Sensitivity Level  
Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.  
DC Electrical Specifications  
Parameter  
All VDDs  
Description  
Condition  
Min.  
3.135  
Max.  
Unit  
V
3.3V Operating Voltage  
Input Low Voltage  
3.3 5%  
3.465  
VILI2C  
VIHI2C  
VIL_FS  
VIH_FS  
VILFS_C  
VIMFS_C  
VIHFS_C  
VIL  
SDATA, SCLK  
SDATA, SCLK  
1.0  
V
Input High Voltage  
2.2  
V
FS_[A,B] Input Low Voltage  
FS_[A,B] Input High Voltage  
FS_C Input Low Voltage  
FS_C Input Middle Voltage  
FS_C Input High Voltage  
3.3V Input Low Voltage  
3.3V Input High Voltage  
Input Low Leakage Current  
Input High Leakage Current  
3.3V Output Low Voltage  
3.3V Output High Voltage  
VSS – 0.3  
0.7  
0.35  
V
VDD + 0.5  
V
VSS – 0.3  
0.9  
0.35  
V
Typical  
Typical  
1.7  
V
2.3  
VDD + 0.5  
V
VSS – 0.3  
2.0  
0.8  
V
VIH  
VDD + 0.3  
V
IIL  
Except internal pull-up resistors, 0 < VIN < VDD  
Except internal pull-down resistors, 0 < VIN < VDD  
IOL = 1 mA  
–5  
5
5
PA  
PA  
V
IIH  
VOL  
0.4  
VOH  
IOH = –1 mA  
2.4  
V
IOZ  
High-impedance Output  
Current  
–10  
10  
PA  
CIN  
Input Pin Capacitance  
Output Pin Capacitance  
Pin Inductance  
3
5
6
pF  
pF  
nH  
V
COUT  
LIN  
3
7
VXIH  
VXIL  
IDD3.3V  
Xin High Voltage  
0.7VDD  
VDD  
0.3VDD  
300  
Xin Low Voltage  
0
V
Dynamic Supply Current  
At max load in low drive mode per Figure 14  
@133 MHz  
mA  
IPD3.3V  
IPD3.3V  
Power-down Supply Current  
Power-down Supply Current  
PD asserted, Outputs Driven  
PD asserted, Outputs Tri-state  
70  
5
mA  
mA  
Rev 1.0,November 20, 2006  
Page 16 of 23  
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