CY28405
AC Electrical Specifications (continued)
Parameter
TLOW
Description
PCIF and PCI Low Time
Conditions
Min.
Max.
Unit
Measurement at 0.4V
12.0
–
ns
TR / TF
PCIF and PCI Rise and Fall Times
Measured between 0.4V and
2.4V
0.5
2.0
ns
TSKEW
TCCJ
Any PCI Clock to Any PCI Clock Skew Measurement at 1.5V
–
–
500
250
ps
ps
PCIF and PCI Cycle to Cycle Jitter
Measurement at 1.5V
DOT
TDC
Duty Cycle
Measurement at 1.5V
Measurement at 1.5V
Measurement at 2.4V
Measurement at 0.4V
45
55
%
ns
ns
ns
TPERIOD
THIGH
Period
20.8257
8.994
8.794
20.8340
10.486
10.386
DOT High Time
DOT Low Time
Rise and Fall Times
TLOW
TR / TF
Measured between 0.4V and
2.4V
0.5
–
1.0
ns
ps
TCCJ
Cycle to Cycle Jitter
10-Ps period
350
USB
TDC
Duty Cycle
Measurement at 1.5V
Measurement at 1.5V
Measurement at 2.4V
Measurement at 0.4V
45
55
%
ns
ns
ns
TPERIOD
THIGH
Period
20.8257
8.094
7.694
20.8340
10.036
9.836
USB High Time
USB Low Time
Rise and Fall Times
TLOW
TR / TF
Measured between 0.4V and
2.4V
1.0
–
2.0
ns
ps
TCCJ
Cycle to Cycle Jitter
125-Ps period
350
REF
TDC
REF Duty Cycle
REF Period
Measurement at 1.5V
Measurement at 1.5V
45
55
%
TPERIOD
TR / TF
69.827
69.855
ns
REF Rise and Fall Times
Measured between 0.4V and
2.4V
1.0
–
4.0
V/ns
ps
TCCJ
REF Cycle to Cycle Jitter
Measurement at 1.5V
1000
ENABLE/DISABLE and SET-UP
TSTABLE All Clock Stabilization from Power-up
TSS
–
10.0
0
1.5
–
ms
ns
ns
Stopclock Set-up Time
Stopclock Hold Time
TSH
–
Table 7. Group Timing Relationship and Tolerances
Offset
Group
Conditions
3V66 Leads PCI
Min.
1.5 ns
Max.
3V66 to PCI
3.5 ns
Table 8. USB to DOT Phase Offset
Parameter
DOT Skew
USB Skew
VCH SKew
Typical
0°
Value
0.0 ns
0.0 ns
0.0 ns
Tolerance
1000 ps
1000 ps
1000 ps
180°
0°
Rev 1.0,November 20, 2006
Page 16 of 18