CY28401
100 MHz Differential Buffer for PCI Express and SATA
Functional Description
Features
• CK409 or CK410 companion buffer
• Eight differential 0.7V clock pairs
• Individual OE controls
The CY28401 is a differential buffer and serves as a
companion device to the CK409 or CK410 clock generator.
The device is capable of distributing the Serial Reference
Clock (SRC) in PCI Express and SATA implementations.
• Low CTC jitter (< 50 ps)
• Programmable bandwidth
• SRC_STOP# power management control
• SMBus Block/Byte/Word Read and Write support
• 3.3V operation
• PLL Bypass-configurable
• Divide by 2 programmable
• 48-pin SSOP package
Block Diagram
Pin Configuration
SRC_DIV2#
VDD
VSS
SRCT_IN
SRCC_IN
OE_0
1
2
3
4
5
6
7
8
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VDD_A
VSS_A
IREF
LOCK
OE_7
OE_4
DIFT7
DIFC7
VSS
DIFT0
DIFC0
OE_[0:7]
Output
Control
SRC_STOP#
DIFT1
DIFC1
PWRDWN#
OE_3
DIFT0
DIFCO
VSS
9
DIFT2
DIFC2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VDD
SCLK
SMBus
Controller
VDD
DIFT6
DIFC6
OE_6
SDATA
DIFT1
DIFC1
OE_1
DIFT3
DIFC3
OE_5
SRC_DIV2#
OE_2
DIFT5
DIFC5
VSS
Output
Buffer
DIFT2
DIFC2
VSS
PLL/BYPASS#
DIFT4
DIFC4
VDD
SRCT_IN
SRCC_IN
VDD
DIFT4
DIFC4
HIGH_BW#
SRC_STOP#
PWRDWN#
VSS
DIFT3
DIFC3
PLL/BYPASS#
SCLK
DIFT5
DIFC5
SDATA
DIFT6
DIFC6
DIV
HIGH_BW#
PLL
48 SSOP
DIFT7
DIFC7
LOCK
Rev 1.0, November 21, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Page 1 of 13
Tel:(408) 855-0555 Fax:(408) 855-0550
www.SpectraLinear.com