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CY28352OC 参数 Datasheet PDF下载

CY28352OC图片预览
型号: CY28352OC
PDF下载: 下载PDF文件 查看货源
内容描述: 差分时钟缓冲器/驱动器DDR400-和DDR333兼容 [Differential Clock Buffer/Driver DDR400- and DDR333-Compliant]
分类和应用: 驱动器逻辑集成电路光电二极管双倍数据速率时钟
文件页数/大小: 7 页 / 118 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28352  
Serial Control Registers  
Following the acknowledge of the Address Byte, two additional  
bytes must be sent:  
• Command Code byte  
• Byte Count byte.  
Byte0: Output Register1 (1 = Enable, 0 = Disable)  
Bit  
7
@Pup  
Pin#  
2, 1  
4, 5  
Description  
Description  
Description  
1
1
1
1
1
1
1
1
CLKT0, CLKC0  
CLKT1, CLKC1  
Reserved  
6
5
4
Reserved  
3
13, 14  
26, 27  
CLKT2, CLKC2  
CLKT5, CLKC5  
Reserved  
2
1
0
24, 25  
CLKT4, CLKC4  
Byte1: Output Register 2 (1 = Enable, 0 = Disable)  
Bit  
7
@Pup  
Pin#  
1
1
0
0
0
0
0
0
Reserved  
CLKT3, CLKC3  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
6
17, 16  
5
4
3
2
1
0
Byte2: Test Register 3  
Bit  
7
@Pup  
Pin#  
1
1
0
0
0
0
0
0
0 = PLL leakage test, 1 = disable test  
6
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
5
4
3
2
1
0
Rev 1.0,November 21, 2006  
Page 3 of 7