CY28347
TPCB
33:
Measurement Point
CPUT
49.9:
2 pF
MULTSEL
TPCB
33:
Measurement Point
CPUC
2 pF
49.9:
IREF
475:
Figure 5. P4 0.7V Configuration
Table 11.Group Timing Relationships and Tolerances
Offset (ps)
Tolerance (ps)
Conditions
tCSAGP
tAP
CPUCS to AGP
AGP to PCI
750
500
500
500
CPUCS Leads
AGP Leads
Table 12.Signal Loading
Clock Name
Max. Load (in pF)
REF (0:1), 48MHz (USB), 24_48MHz
20
30
AGP(0:2), PCI_F(0:5)SDRAM (0:11)
FBOUT
10
DDRT/C
See Figure 1
See Figure 4 and Figure 5
See Figure 2
See Figure 3
CPUT/C
CPUOD_T/C
CPUCS_T/C
0 ns
10 ns
20 ns
30 ns
CPU CLOCK 66.6 MHz
CPU CLOCK 100 MHz
CPU CLOCK 133.3 MHz
tCSAGP
AGP CLOCK 66.6 MHz
PCI CLOCK 33.3 MHz
tAP
Figure 6. Clock Timing Relationships
Rev 1.0,November 20, 2006
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