CY28341-3
AC Parameters (continued)
100 MHz
133MHz
200 MHz
Min. Max. Unit
Parameter
Description
Min.
Max.
Min.
Max
Notes
P4 Mode CPU at 0.7V
TDC
CPUT/C Duty Cycle
45
9.997
175
–
55
45
55
45
55
%
6,7,9,20,23
TPERIOD
TR/TF
CPUT/C Period
10.003 7.4978 7.5023 4.9985 5.0015 ns 6,7,9,20,23
CPUT/C Rise and Fall Times
Rise/Fall Matching
1300
20%
125
100
250
550
175
–
1300
20%
125
100
250
550
175
–
1300
20%
125
100
250
550
ps 22
22,25
' TR/TF
TSKEW
TCCJ
Rise/Fall Time Variation
CPUCS_T/C to CPUT/C Clock Skew
CPUT/C Cycle to Cycle Jitter
–
–
–
ps 7,22,23
ps 7,10,20,23
ps 7,10,20,23
mV 23
–
–
–
–
–
–
VCROSS
K7 Mode
TDC
Crossing Point Voltage at 0.7V Swing 250
250
250
CPUOD_T/C Duty Cycle
CPUOD_T/C Period
45
9.997
2.8
55
45
55
45
55
% 7,9
TPERIOD
TLOW
10.003 7.4978 7.5023 4.9985 5.0015 ns 7,9
CPUOD_T/C Low Time
CPUOD_T/C Fall Time
–
1.67
0.4
–
–
2.8
0.4
–
–
ns 7,9
ns 7,8
TF
0.4
–
1.6
100
1.6
100
1.6
100
TSKEW
CPUCS_T/C to CPUODT/C Clock
Skew
0
7,10,20
TCCJ
CPUOD_T/C Cycle-to-Cycle Jitter
Differential Voltage AC
–
150
–
150
–
150
ps 7,9
VDIFF
.4
Vp+.6V
.4
Vp+.6V
.4
Vp+.6V
V 19
VCROSS
Differential Crossover Voltage
0.5*VDD 0.5*VDDC 0.5*VDD 0.5*VDD 0.5*VDD 0.5*VDD mV 18
C–0.1
+0.1
C–0.1
C+0.1
C–0.1
C+0.1
CHIPSET CLOCK
TDC CPUCS_T/C Duty Cycle
40
9.997
0.4
60
40
60
40
60
% 6,7,9
TPERIOD
TR / TF
VDIFF
CPUCS_T/C Period
10.003 7.4978 7.5023 4.9985 5.0015 ns 6,7,9
CPUCS_T/C Rise and Fall Times
Differential Voltage AC
1.6
0.4
.4
1.6
0.4
.4
1.6
ns 6,7,8
.4
Vp+.6V
Vp+.6V
Vp+.6V
V
V
21
20
VCROSS
Differential Crossover Voltage
0.5*VDD 0.5*VDDI+ 0.5*VDD 0.5*VDD 0.5*VDD 0.5*VDD
I–0.8
0.8
I–0.8
I+0.8
I–0.8
I+0.8
AGP
TDC
AGP Duty Cycle
45
15
55
15.3
–
45
15
55
15.3
–
45
15
55
15.3
–
%
6,7,9
TPERIOD
THIGH
TLOW
TR / TF
TSKEW
TCCJ
AGP Period
ns 6,7,9
ns 7,11
ns 7,12
ns 7,8
AGP High Time
4.95
4.55
0.5
–
4.95
4.55
0.5
–
4.95
4.55
0.5
–
AGP Low Time
–
–
–
AGP Rise and Fall Times
Any AGP to Any AGP Clock Skew
AGP Cycle-to-Cycle Jitter
2.0
250
500
2.0
250
500
2.0
250
500
ps 7,10
ps 7,9,10
–
–
–
PCI
TDC
PCI_F Duty Cycle
45
30.0
12.0
12.0
0.5
–
55
–
45
30.0
12.0
12.0
0.5
–
55
–
45
30.0
12.0
12.0
0.5
–
55
–
% 6,7,9
TPERIOD
THIGH
TLOW
TR / TF
TSKEW
TCCJ
PCI_F Period
ns 6,7,9
ns 7,11
ns 7,12
ns 7,27
ps 7,10
ps 7,9,10
PCI_F High Time
–
–
–
PCI_F Low Time
–
–
–
PCI_F Rise and Fall Times
Any PCI to Any PCI Clock Skew
PCI_F Cycle-to-Cycle Jitter
2.0
500
500
2.0
500
500
2.0
500
500
–
–
–
48 MHz
TDC
48-MHz Duty Cycle
45
55
45
55
45
55
% 6,7,9
TPERIOD
TR / TF
TCCJ
48-MHz Period
20.8299 20.8333 20.8299 20.8333 20.8299 20.8333 ns 6,7,9
48-MHz Rise and Fall Times
48-MHz Cycle-to-Cycle Jitter
1.0
–
2.0
1.0
–
2.0
1.0
–
2.0
ns 7,8
350
350
350
ps 7,9,10
Rev 1.0,November 21, 2006
Page 16 of 19
SPECTRALINEAR [ SPECTRALINEAR INC ]
