CY28339
1. Output impedance of the current mode buffer circuit – Ro
(see Figure 14).
Buffer Characteristics
Current Mode CPU Clock Buffer Characteristics
2. Minimum and maximum required voltage operation range
of the circuit – Vop (see Figure 14).
The current mode output buffer detail and current reference
circuit details are contained in the previous table of this data
sheet. The following parameters are used to specify output
buffer characteristics:
3. Series resistance in the buffer circuit – Ros (see Figure 14).
4. Current accuracy at given configuration into nominal test
load for given configuration.
VDD3 (3.3V +/- 5%)
Slope ~ 1/R0
Ro
Iout
Ros
0V
1.2V
Iout
Vout = 1.2V max
Vout
Figure 14. Buffer Characteristics
Table 6. Host Clock (HCSL) Buffer Characteristics
Characteristic
Min.
Max.
Ro
3000: (recommended)
N/A
Ros
Vout
N/A
1.2V
Table 7. Maximum Lumped Capacitive Output Loads
Clock
PCI Clocks
3V66
Max Load
Units
pF
30
30
30
20
10
50
pF
66BUFF
pF
USB_48M Clock
DOT_48M
REF Clock
pF
pF
pF
Rev 1.0,November 25, 2006
Page 12 of 17
SPECTRALINEAR [ SPECTRALINEAR INC ]
