A d v a n c e I n f o r m a t i o n
AC Characteristics
tRC
VA
Addresses
VA
VA
tACC
tCE
CE#
tCH
tOE
OE#
tOEH
WE#
tDF
tOH
High Z
High Z
DQ7
Valid Data
Complement
Complement
Status Data
True
DQ6–DQ0
Status Data
True
Valid Data
tBUSY
RY/BY#
Note:
1. VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read
cycle.
2. tOE for data polling is 45 ns when VIO = 1.65 to 2.7 V and is 35 ns when VIO = 2.7 to 3.6 V
Figure 17. Data# Polling Timings
(During Embedded Algorithms)
98
S29GLxxxN MirrorBitTM Flash Family
27631A4 May 13, 2004
SPANSION [ SPANSION ]
