A d v a n c e I n f o r m a t i o n
AC Characteristics
Alternate CE# Controlled Erase and Program Operations–S29GL128N Only
Parameter
JEDEC Std. Description
tAVAV tWC Write Cycle Time (Note 1)
Speed Options
80
90
90
100
Unit
ns
Min
Min
Min
Min
Min
80
90
90
100
tAVWL
tELAX
tDVEH
tEHDX
tAS
tAH
tDS
tDH
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
0
45
45
0
ns
ns
ns
ns
Read Recovery Time Before Write
(OE# High to WE# Low)
tGHEL
tGHEL
Min
0
ns
tWLEL
tEHWH
tELEH
tEHEL
tWS
tWH
tCP
WE# Setup Time
WE# Hold Time
Min
Min
Min
Min
0
0
ns
ns
ns
ns
CE# Pulse Width
CE# Pulse Width High
45
30
tCPH
Write Buffer Program Operation (Notes 2,
3)
Typ
Typ
240
15
µs
µs
Effective Write Buffer
Program Operation (Notes
Per Word
Per Word
2, 4)
tWHWH1 tWHWH1 Effective Accelerated Write
Buffer Program Operation
(Notes 2, 4)
Typ
13.5
µs
Program Operation (Note 2)
Word
Word
Typ
Typ
Typ
60
54
µs
µs
Accelerated Programming
Operation (Note 2)
tWHWH2 tWHWH2 Sector Erase Operation (Note 2)
1.0
sec
Notes:
1. Not 100% tested.
2. See the “AC Characteristics” section for more information.
3. For 1–16 words/1–32 bytes programmed.
4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation.
5. Unless otherwise indicated, AC specifications for 80 ns and 90 ns speed options are tested with V = V = 3 V. AC
IO
CC
specifications for 90 ns and 100 ns speed options are tested with V = 1.8 V and V = 3.0 V.
IO
CC
102
S29GLxxxN MirrorBitTM Flash Family
27631A4 May 13, 2004
SPANSION [ SPANSION ]
